欢迎访问ic37.com |
会员登录 免费注册
发布采购

SA7025DK 参数 Datasheet PDF下载

SA7025DK图片预览
型号: SA7025DK
PDF下载: 下载PDF文件 查看货源
内容描述: 低电压1GHz的小数N分频合成器 [Low-voltage 1GHz fractional-N synthesizer]
分类和应用: 信号电路锁相环或频率合成电路光电二极管信息通信管理
文件页数/大小: 22 页 / 307 K
品牌: PHILIPS [ NXP SEMICONDUCTORS ]
 浏览型号SA7025DK的Datasheet PDF文件第3页浏览型号SA7025DK的Datasheet PDF文件第4页浏览型号SA7025DK的Datasheet PDF文件第5页浏览型号SA7025DK的Datasheet PDF文件第6页浏览型号SA7025DK的Datasheet PDF文件第8页浏览型号SA7025DK的Datasheet PDF文件第9页浏览型号SA7025DK的Datasheet PDF文件第10页浏览型号SA7025DK的Datasheet PDF文件第11页  
Philips Semiconductors
Product specification
1GHz low-voltage Fractional-N synthesizer
SA7025
AC ELECTRICAL CHARACTERISTICS
(continued)
SYMBOL
PARAMETER
TEST CONDITIONS
A word, PR = ‘01’
t
SW
Pulse width STROBE
width;
A word, PR = ‘10’
1
f
VCO
LIMITS
MIN
TYP
MAX
1
@
(NM2
@
65)
)
t
W
f
VCO
@
[(NM2
@
65)
)
(NM3
)
1)
@
72]
)
t
W
UNITS
ns
NOTES:
1. When a serial input “A” word is programmed, the main charge pumps on PHP and PHI are in the “speed up mode” as long as STROBE = H.
When this is not the case, the main charge pumps are in the “normal mode”.
2. The relative output current variation is defined thus:
DI
OUT
(I
*
I
1
)
+
2
@
2
; with V
1
= 0.7V, V
2
= V
DDA
– 0.8V (see Figure 3).
|(I
2
)
I
1
)|
I
OUT
3. F
RD
is the value of the 3 bit fractional accumulator.
4. Monotonicity is guaranteed with C
N
= 0 to 255.
5. Power supply current measured with V
DD
= V
CCP
= 3V, V
DDA
= 5V, f
RF IN
= 915.99MHz, XTAL at 21.36MHz, AUX at 85.92MHz (PA = ‘0’),
Main comp frequency = 240kHz, Auxiliary comp frequency = 120kHz, CN = 160, CL = 0, CK = 0. Internal registers NM1 = 52, NM2 = 0,
NM3 = 4, PR = ‘10’, SM = ‘00’, SA = ‘01’, NA = 179, NF = 5, FMOD = 8, NR = 89, PA = 0, IRN = IRA = IRF = 25µA, lock condition, normal
mode. Operational supply current = I
DDA
+ I
DD
+ I
CCP
.
6. Specification condition: CN = 255
7. Specification conditions:
1) CN = 255; CL = 1, or
2) CN = 75; CL = 3
8. Typical output current | I
PHI
| = –I
RN
x CN x 2
(CL+1)
x CK/32:
1) CN = 160; CL = 3; CK = 1, or
2) CN = 160; CL = 2; CK = 2, or
3) CN = 160; CL = 1; CK = 4, or
4) CN = 160; CL = 0; CK = 8
9. Any RFD, CL = 1 for speed-up pump. The integral pump is intended for switching only and the fractional compensation is not guaranteed.
10. Specification conditions: F
RD
= 1 to 7; CL = 1.
11. Specification conditions:
1) F
RD
= 1 to 7; CL = 1; CK = 2, or
2) F
RD
= 1 to 7; CL = 2; CK = 1.
12. The matching is defined by the sum of the P and the N pump for a given output voltage.
13. Limited analog supply voltage range 4.5 to 5.5V.
14. For f
IN
< 50MHz, low frequency operation requires DC-coupling and a minimum input slew rate of 32V/µs.
15. Guaranteed by design.
16. Close in noise for the charge pumps is tested on a sample basis in a typical application in order to eliminate parts outside the normal
distribution.
17. F
XTAL
= 14.4MHz, V
XTAL
= 500mV
P-P
, comparison frequency = 200kHz, Loop bandwidth = 5kHz, Audio filter = 300Hz to 15kHz.
1996 Aug 6
7