Philips Semiconductors
Product specification
Complementary enhancement mode
MOS transistors
PHC2300
FEATURES
PINNING - SOT96-1 (SO8)
• High-speed switching
PIN
SYMBOL
DESCRIPTION
• No secondary breakdown.
1
2
3
4
5
6
7
8
s1
g1
s2
g2
d2
d2
d1
d1
source 1
gate 1
APPLICATIONS
source 2
gate 2
• Universal line interface in telephone sets
drain 2
drain 2
drain 1
drain 1
• Relay, high-speed and line transformer drivers.
DESCRIPTION
One N-channel and one P-channel enhancement mode
MOS transistor in an 8-pin plastic SOT96-1 (SO8)
package.
d
d
d
d
2
2
1
1
handbook, halfpage
8
CAUTION
5
4
The device is supplied in an antistatic package.
The gate-source input must be protected against static
discharge during transport or handling.
1
s
g
s
g
2
1
1
2
MAM118
Fig.1 Simplified outline and symbol.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
Per FET
VDS
drain-source voltage (DC)
N-channel
−
−
−
300
V
P-channel
−300
±20
V
V
V
V
V
VGS
gate-source voltage (DC)
gate-source threshold voltage
N-channel
VGSth
VDS = VGS; ID = 1 mA
0.8
2
P-channel
VDS = VGS; ID = −1 mA
−0.8
−2
ID
drain current (DC)
N-channel
Ts = 80 °C
−
−
340
mA
mA
P-channel
−235
RDSon
drain-source on-state resistance
N-channel
VGS = 10 V; ID = 170 mA
−
−
−
8
Ω
Ω
W
P-channel
VGS = −10 V; ID = −115 mA
17
1.6
Ptot
total power dissipation
Ts = 80 °C
1997 Oct 24
2
NXP [ NXP ]
