PCF8583
NXP Semiconductors
Clock and calendar with 240 x 8-bit RAM
10. Characteristics
10.1 Static characteristics
Table 7.
Static characteristics
VDD = 2.5 V to 6.0 V; VSS = 0 V; Tamb = −40 °C to +85 °C unless otherwise specified.
Symbol
VDD
Parameter
Conditions
Min
Typ[1]
Max
Unit
supply voltage
operating mode
I2C-bus active
2.5
1.0
-
-
6.0
6.0
V
V
I2C-bus inactive
quartz oscillator
Tamb = 0 °C to +70 °C
operating mode
fSCL = 100 kHz clock mode
clock mode; fSCL = 0 Hz
VDD = 5.0 V
[2]
[3]
1.0
-
-
-
6.0
V
IDD
supply current
200
μA
[4]
[4]
-
-
10
2
50
10
μA
μA
VDD = 1.0 V
data retention;
fOSCI = 0 Hz; VDD = 1.0 V
Tamb = −40 °C to +85 °C
Tamb = −25 °C to +70 °C
I2C-bus enable level
-
-
5
μA
μA
V
-
-
2
[5]
Ven
Pin SDA
VIL
enable voltage
1.5
1.9
2.3
[6]
[6]
LOW-level input voltage
HIGH-level input voltage
LOW-level output current
input leakage current
input capacitance
−0.8
0.7VDD
3.0
-
-
-
-
-
0.3VDD
V
VIH
VDD + 0.8
V
IOL
-
mA
μA
pF
ILI
−1
+1
7
[7]
CI
-
Pins A0 and OSCI
ILI
input leakage current
VI = VDD or VSS
−250
-
+250
nA
Pin INT
IOL
LOW-level output current VOL = 0.4 V
3
-
-
-
mA
ILI
input leakage current
VI = VDD or VSS
−1
+1
μA
Pin SCL
ILI
CI
input leakage current
input capacitance
VI = VDD or VSS
−1
-
-
+1
7
μA
[7]
-
pF
[1] Typical values measured at Tamb = 25 °C.
[2] When the device is powered on, VDD must exceed 1.5 V until the stable operation of the oscillator is established.
[3] Event counter mode: supply current dependant upon input frequency.
[4] See Figure 21.
[5] The I2C-bus logic is disabled if VDD < Ven
.
[6] When the voltages are above or below the supply voltages VDD or VSS, an input current will flow; this current must not exceed ±0.5 mA.
[7] Tested on a sample basis.
PCF8583
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 06 — 6 October 2010
20 of 37
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