PCF8583
NXP Semiconductors
Clock and calendar with 240 x 8-bit RAM
START
CONDITION
(S)
BIT 7
MSB
(A7)
BIT 6
(A6)
BIT 0
LSB
(R/W)
ACKNOWLEDGE
(A)
STOP
CONDITION
(P)
PROTOCOL
t
t
t
SU;STA
LOW
HIGH
1 / f
SCL
SCL
SDA
t
t
t
f
BUF
r
t
t
t
t
t
HD;STA
SU;DAT
HD;DAT
VD;DAT
SU;STO
mbd820
Fig 22. I2C-bus timing diagram; rise and fall times refer to VIL and VIH
PCF8583
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 06 — 6 October 2010
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