PCF8583
NXP Semiconductors
Clock and calendar with 240 x 8-bit RAM
MSB
7
LSB
memory location 08h
reset state: 0000 0000
6
5
4
3
2
1
0
timer function:
no timer
000
hundredths of a second
seconds
minutes
hours
days
not used
test mode, all counters
in parallel (factory use only)
001
010
011
100
101
110
111
timer interrupt enable:
timer flag, no interrupt
timer flag, interrupt
0
1
clock alarm function:
no clock alarm
daily alarm
weekday alarm
dated alarm
00
01
10
11
timer alarm enable:
no timer alarm
timer alarm
0
1
alarm interrupt enable:
013aaa374
(only valid when alarm enable in
the control and status register is set)
alarm flag, no interrupt
alarm flag, interrupt
0
1
Fig 10. Alarm control registers, clock mode
7.6 Alarm registers
All alarm registers are allocated with a constant address offset of 08h to the
corresponding counter registers (see Figure 9).
An alarm signal is generated when the contents of the alarm registers match bit-by-bit the
contents of the involved counter registers. The year and weekday bits are ignored in a
dated alarm. A daily alarm ignores the month and date bits. When a weekday alarm is
selected, the contents of the alarm weekday and month register selects the weekdays on
which an alarm is activated (see Figure 11).
Remark: In the 12 hour mode, bits 6 and 7 of the alarm hours register must be the same
as the hours counter.
PCF8583
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 06 — 6 October 2010
10 of 37
NXP [ NXP ]
