PCF8563
NXP Semiconductors
Real-time clock/calendar
12. Static characteristics
Table 29. Static characteristics
VDD = 1.8 V to 5.5 V; VSS = 0 V; Tamb = 40 C to +85 C; fosc = 32.768 kHz; quartz Rs = 40 k; CL = 8 pF; unless otherwise
specified.
Symbol
Supplies
VDD
Parameter
Conditions
Min
Typ
Max
Unit
[1]
[1]
supply voltage
interface inactive;
fSCL = 0 Hz;
Tamb = 25 C
1.0
-
5.5
V
interface active;
1.8
-
-
5.5
5.5
V
V
f
SCL = 400 kHz
clock data integrity;
Vlow
Tamb = 25 C
IDD
supply current
interface active
fSCL = 400 kHz
fSCL = 100 kHz
-
-
-
-
800
200
A
A
[2]
[2]
[2]
[2]
interface inactive (fSCL = 0 Hz); CLKOUT
disabled; Tamb = 25 C
VDD = 5.0 V
VDD = 3.0 V
VDD = 2.0 V
-
-
-
275
250
225
550
500
450
nA
nA
nA
interface inactive (fSCL = 0 Hz); CLKOUT
disabled; Tamb = 40 C to +85 C
VDD = 5.0 V
VDD = 3.0 V
VDD = 2.0 V
-
-
-
500
400
400
750
650
600
nA
nA
nA
interface inactive (fSCL = 0 Hz); CLKOUT
enabled at 32 kHz; Tamb = 25 C
VDD = 5.0 V
VDD = 3.0 V
VDD = 2.0 V
-
-
-
825
550
425
1600
1000
800
nA
nA
nA
interface inactive (fSCL = 0 Hz); CLKOUT
enabled at 32 kHz; Tamb = 40 C to +85 C
VDD = 5.0 V
VDD = 3.0 V
VDD = 2.0 V
-
-
-
950
650
500
1700
1100
900
nA
nA
nA
Inputs
VIL
LOW-level input
voltage
VSS
-
0.3VDD
VDD
+1
V
VIH
ILI
HIGH-level
input voltage
0.7VDD
-
V
input leakage
current
VI = VDD or VSS
1
0
-
A
pF
[3]
Ci
input
-
7
capacitance
PCF8563
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 10 — 3 April 2012
31 of 50
NXP [ NXP ]
