Philips Semiconductors
Product specification
Single-chip 8-bit microcontroller
80C552/83C552
PIN DESCRIPTION
PIN NO.
MNEMONIC
PLCC
QFP
TYPE
NAME AND FUNCTION
V
DD
2
72
I
Digital Power Supply: +5V power supply pin during normal operation, idle and
power-down mode.
STADC
3
74
I
Start ADC Operation: Input starting analog to digital conversion (ADC operation can also
be started by software). This pin must not float.
PWM0
PWM1
EW
4
5
6
75
76
77
O
O
I
Pulse Width Modulation: Output 0.
Pulse Width Modulation: Output 1.
Enable Watchdog Timer: Enable for T3 watchdog timer and disable power-down mode.
This pin must not float.
P0.0-P0.7
57-50
58-51
I/O
Port 0: Port 0 is an 8-bit open-drain bidirectional I/O port. Port 0 pins that have 1s written
to them float and can be used as high-impedance inputs. Port 0 is also the multiplexed
low-order address and data bus during accesses to external program and data memory. In
this application it uses strong internal pull-ups when emitting 1s.
P1.0-P1.7
16-23
16-21
22-23
16-19
20
10-17
10-15
16-17
10-13
14
I/O
I/O
I/O
I
Port 1: 8-bit I/O port. Alternate functions include:
(P1.0-P1.5): Quasi-bidirectional port pins.
(P1.6, P1.7): Open drain port pins.
CT0I-CT3I (P1.0-P1.3): Capture timer input signals for timer T2.
T2 (P1.4): T2 event input.
I
21
22
23
15
16
17
I
RT2 (P1.5): T2 timer reset signal. Rising edge triggered.
2
I/O
I/O
SCL (P1.6): Serial port clock line I C-bus.
2
SDA (P1.7): Serial port data line I C-bus.
Port 1 is also used to input the lower order address byte during EPROM programming and
verification. A0 is on P1.0, etc.
P2.0-P2.7
P3.0-P3.7
39-46
24-31
38-42,
45-47
I/O
I/O
Port 2: 8-bit quasi-bidirectional I/O port.
Alternate function: High-order address byte for external memory (A08-A15).
18-20,
23-27
Port 3: 8-bit quasi-bidirectional I/O port. Alternate functions include:
24
25
26
27
28
29
30
31
18
19
20
23
24
25
26
27
RxD(P3.0): Serial input port.
TxD (P3.1): Serial output port.
INT0 (P3.2): External interrupt.
INT1 (P3.3): External interrupt.
T0 (P3.4): Timer 0 external input.
T1 (P3.5): Timer 1 external input.
WR (P3.6): External data memory write strobe.
RD (P3.7): External data memory read strobe.
P4.0-P4.7
P5.0-P5.7
7-14
7-12
80, 1-2
4-8
I/O
O
Port 4: 8-bit quasi-bidirectional I/O port. Alternate functions include:
80, 1-2
4-6
CMSR0-CMSR5 (P4.0-P4.5): Timer T2 compare and set/reset outputs on a match with
timer T2.
13, 14
7, 8
O
I
CMT0, CMT1 (P4.6, P4.7): Timer T2 compare and toggle outputs on a match with timer T2.
68-62,
1
71-64,
Port 5: 8-bit input port.
ADC0-ADC7 (P5.0-P5.7): Alternate function: Eight input channels to ADC.
RST
15
9
I/O
I
Reset: Input to reset the 8XC552. It also provides a reset pulse as output when timer T3
overflows.
XTAL1
35
32
Crystal Input 1: Input to the inverting amplifier that forms the oscillator, and input to the
internal clock generator. Receives the external clock signal when an external oscillator is
used.
XTAL2
34
31
O
Crystal Input 2: Output of the inverting amplifier that forms the oscillator. Left open-circuit
when an external clock is used.
7
1998 Aug 13
NXP [ NXP ]
