欢迎访问ic37.com |
会员登录 免费注册
发布采购

LPC2138FBD64,151 参数 Datasheet PDF下载

LPC2138FBD64,151图片预览
型号: LPC2138FBD64,151
PDF下载: 下载PDF文件 查看货源
内容描述: [LPC2131/32/34/36/38 - Single-chip 16/32-bit microcontrollers; 32/64/128/256/512 kB ISP/IAP flash with 10-bit ADC and DAC QFP 64-Pin]
分类和应用: 时钟PC微控制器外围集成电路
文件页数/大小: 45 页 / 318 K
品牌: NXP [ NXP ]
 浏览型号LPC2138FBD64,151的Datasheet PDF文件第13页浏览型号LPC2138FBD64,151的Datasheet PDF文件第14页浏览型号LPC2138FBD64,151的Datasheet PDF文件第15页浏览型号LPC2138FBD64,151的Datasheet PDF文件第16页浏览型号LPC2138FBD64,151的Datasheet PDF文件第18页浏览型号LPC2138FBD64,151的Datasheet PDF文件第19页浏览型号LPC2138FBD64,151的Datasheet PDF文件第20页浏览型号LPC2138FBD64,151的Datasheet PDF文件第21页  
LPC2131/32/34/36/38  
NXP Semiconductors  
Single-chip 16/32-bit microcontrollers  
6.7.2 Fast I/O features available in LPC213x/01 only  
Fast I/O registers are located on the ARM local bus for the fastest possible I/O timing.  
All GPIO registers are byte addressable.  
Entire port value can be written in one instruction.  
Mask registers allow single instruction to set or clear any number of bits in one port.  
6.8 10-bit ADC  
The LPC2131/32 contain one and the LPC2134/36/38 contain two ADCs. These  
converters are single 10-bit successive approximation ADCs with eight multiplexed  
channels.  
6.8.1 Features  
Measurement range of 0 V to 3.3 V.  
Each converter capable of performing more than 400000 10-bit samples per second.  
Burst conversion mode for single or multiple inputs.  
Optional conversion on transition on input pin or Timer Match signal.  
Global Start command for both converters (LPC2134/36/38 only).  
6.8.2 ADC features available in LPC213x/01 only  
Every analog input has a dedicated result register to reduce interrupt overhead.  
Every analog input can generate an interrupt once the conversion is completed.  
6.9 10-bit DAC  
This peripheral is available in the LPC2132/34/36/38 only. The DAC enables the  
LPC2132/34/36/38 to generate variable analog output.  
6.9.1 Features  
10-bit digital to analog converter.  
Buffered output.  
Power-down mode available.  
Selectable speed versus power.  
6.10 UARTs  
The LPC2131/32/34/36/38 each contain two UARTs. In addition to standard transmit and  
receive data lines, the LPC2134/36/38 UART1 also provides a full modem control  
handshake interface.  
6.10.1 Features  
16 B Receive and Transmit FIFOs.  
Register locations conform to 16C550 industry standard.  
Receiver FIFO trigger points at 1 B, 4 B, 8 B, and 14 B  
LPC2131_32_34_36_38  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 5.1 — 29 July 2011  
17 of 45  
 
 
 
 
 
 
 
 
 复制成功!