ISP1362
Single-chip USB OTG controller
Philips Semiconductors
15.1 HC control and status registers
15.1.1 HcRevision register (R: 00H)
The bit allocation of the HcRevision register is given in Table 35.
Code (Hex): 00 — read only
Table 35: HcRevision register: bit allocation
Bit
31
30
29
28
27
26
25
24
Symbol
Reset
Access
Bit
reserved
reserved
reserved
REV[7:0]
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
23
22
21
20
19
18
17
16
Symbol
Reset
Access
Bit
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
15
14
13
12
11
10
9
8
Symbol
Reset
Access
Bit
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
7
6
5
4
3
2
1
0
Symbol
Reset
Access
0
0
0
1
0
0
0
1
R
R
R
R
R
R
R
R
Table 36: HcRevision register: bit description
Bit
Symbol
Description
31 to 8
7 to 0
−
Reserved
REV[7:0] Revision: This read-only field contains the Binary-Coded Decimal
(BCD) representation of the version of the HCI specification that is
implemented by this HC. For example, a value of 11H corresponds
to version 1.1. All HC implementations that are compliant with this
specification need to have a value of 11H.
15.1.2 HcControl register (R/W: 01H/81H)
The HcControl register defines the operating modes for the HC. The RWE bit is
modified only by the HCD. Table 37 shows the bit allocation of the register.
Code (Hex): 01 — read
Code (Hex): 81 — write
Table 37: HcControl register: bit allocation
Bit
31
30
29
28
27
26
25
24
Symbol
Reset
Access
reserved
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
9397 750 12337
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 03 — 06 January 2004
71 of 150
NXP [ NXP ]
