ISP1362
Single-chip USB OTG controller
Philips Semiconductors
Contents
1
General description. . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Host/peripheral roles . . . . . . . . . . . . . . . . . . . . . . . . . 3
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Ordering information. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
13.4
13.5
DC direct memory access (DMA) transfer . . . . . . . . 54
ISP1362 DC suspend and resume . . . . . . . . . . . . . . 58
2
14
OTG registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
OtgControl register (R/W: 62H/E2H) . . . . . . . . . . . . 60
OtgStatus register (R: 67H) . . . . . . . . . . . . . . . . . . . 62
OtgInterrupt register (R/W: 68H/E8H). . . . . . . . . . . . 63
OtgInterruptEnable register (R/W: 69H/E9H) . . . . . . 66
OtgTimer register (R/W: 6AH/EAH) . . . . . . . . . . . . . 67
OtgAltTimer register (R/W: 6CH/ECH) . . . . . . . . . . . 68
3
14.1
14.2
14.3
14.4
14.5
14.6
3.1
4
5
6
7
Pinning information. . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
7.1
7.2
15
HC registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
HC control and status registers . . . . . . . . . . . . . . . . 71
HC Frame Counter registers. . . . . . . . . . . . . . . . . . . 78
HC Root Hub registers . . . . . . . . . . . . . . . . . . . . . . . 82
HC DMA and interrupt control registers . . . . . . . . . . 92
HC miscellaneous registers . . . . . . . . . . . . . . . . . . . 98
HC buffer RAM control registers. . . . . . . . . . . . . . . . 99
Isochronous (ISO) transfer registers. . . . . . . . . . . . 101
Interrupt transfer registers. . . . . . . . . . . . . . . . . . . . 103
Control and bulk transfer (aperiodic transfer) registers
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
15.1
15.2
15.3
15.4
15.5
15.6
15.7
15.8
15.9
8
Functional description . . . . . . . . . . . . . . . . . . . . . . . 13
On-The-Go (OTG) controller . . . . . . . . . . . . . . . . . . 13
Advanced Philips Slave Host Controller (PSHC) . . . 13
Philips Device Controller (DC) . . . . . . . . . . . . . . . . . 13
Phase-Locked Loop (PLL) clock multiplier. . . . . . . . 13
USB and OTG transceivers . . . . . . . . . . . . . . . . . . . 13
Overcurrent protection . . . . . . . . . . . . . . . . . . . . . . . 13
Bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
DC and HC buffer memory. . . . . . . . . . . . . . . . . . . . 13
GoodLink . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Charge pump . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
8.1
8.2
8.3
8.4
8.5
8.6
8.7
8.8
8.9
8.10
16
Device Controller (DC) registers. . . . . . . . . . . . . . . 110
Initialization commands . . . . . . . . . . . . . . . . . . . . . 113
Data flow commands . . . . . . . . . . . . . . . . . . . . . . . 119
General commands . . . . . . . . . . . . . . . . . . . . . . . . 123
16.1
16.2
16.3
9
Host and device bus interface . . . . . . . . . . . . . . . . . 14
Memory organization . . . . . . . . . . . . . . . . . . . . . . . . 15
PIO access mode. . . . . . . . . . . . . . . . . . . . . . . . . . . 19
DMA mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
PIO access to internal control registers . . . . . . . . . . 21
PIO access to the buffer memory. . . . . . . . . . . . . . . 24
Setting up a DMA transfer . . . . . . . . . . . . . . . . . . . . 26
Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
9.1
9.2
9.3
9.4
9.5
9.6
9.7
17
18
19
Limiting values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
Recommended operating conditions. . . . . . . . . . . 129
Static characteristics . . . . . . . . . . . . . . . . . . . . . . . . 130
20
Dynamic characteristics . . . . . . . . . . . . . . . . . . . . . 134
Programmed I/O timing. . . . . . . . . . . . . . . . . . . . . . 135
DMA timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
20.1
20.2
10
Power-on reset (POR) . . . . . . . . . . . . . . . . . . . . . . . . 30
21
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
11
On-The-Go (OTG) controller . . . . . . . . . . . . . . . . . . . 31
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Dual-role device . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Session Request Protocol (SRP). . . . . . . . . . . . . . . 33
Host Negotiation Protocol (HNP) . . . . . . . . . . . . . . . 34
Power saving in the idle state and during wake-up . 38
Current capacity of the OTG charge pump . . . . . . . 38
22
Soldering. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145
Introduction to soldering surface mount packages . 145
Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . 145
Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145
Manual soldering . . . . . . . . . . . . . . . . . . . . . . . . . . 146
Package related soldering information . . . . . . . . . . 146
11.1
11.2
11.3
11.4
11.5
11.6
22.1
22.2
22.3
22.4
22.5
23
24
25
26
27
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . . . . . 149
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149
12
USB Host Controller (HC) . . . . . . . . . . . . . . . . . . . . . 39
USB states of the HC. . . . . . . . . . . . . . . . . . . . . . . . 39
USB traffic generation . . . . . . . . . . . . . . . . . . . . . . . 40
USB ports. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Philips Transfer Descriptor (PTD). . . . . . . . . . . . . . . 41
Features of the control and bulk transfer
12.1
12.2
12.3
12.4
12.5
(aperiodic transfer) . . . . . . . . . . . . . . . . . . . . . . . . . 44
Features of the interrupt transfer . . . . . . . . . . . . . . . 46
Features of the isochronous (ISO) transfer . . . . . . . 46
Overcurrent protection circuit. . . . . . . . . . . . . . . . . . 46
ISP1362 HC Power Management . . . . . . . . . . . . . . 49
12.6
12.7
12.8
12.9
13
USB Device Controller (DC) . . . . . . . . . . . . . . . . . . . 50
DC data transfer operation. . . . . . . . . . . . . . . . . . . . 50
Device DMA transfer . . . . . . . . . . . . . . . . . . . . . . . . 51
Endpoint description . . . . . . . . . . . . . . . . . . . . . . . . 52
13.1
13.2
13.3
© Koninklijke Philips Electronics N.V. 2004.
Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner.
The information presented in this document does not form part of any quotation or
contract, is believed to be accurate and reliable and may be changed without notice. No
liability will be accepted by the publisher for any consequence of its use. Publication
thereof does not convey nor imply any license under patent- or other industrial or
intellectual property rights.
Date of release: 06 January 2004
Document order number: 9397 750 12337
NXP [ NXP ]
