ISP1362
Single-chip USB OTG controller
Philips Semiconductors
Table 135: DcFrameNumber register: bit allocation
Bit
15
14
13
12
11
10
9
8
Symbol
Reset[1]
Access
Bit
reserved
SOFR[9:8]
-
-
-
-
-
-
-
-
-
-
0
R
2
0
R
1
0
R
0
7
6
5
4
3
Symbol
Reset[1]
Access
SOFR[7:0]
0
0
0
0
0
0
0
0
R
R
R
R
R
R
R
R
[1] Reset value undefined after a bus reset.
Table 136: DcFrameNumber register: bit description
Bit
Symbol
-
Description
reserved
15 to 11
10 to 0
SOFR[9:0]
frame number
Table 137: Example of DcFrameNumber register access
A0
Phase
Bus lines
D[15:8]
D[7:0]
Word #
Description
HIGH
command
-
ignored
-
command code (B4H)
frame number
LOW
data
D[15:0]
0
16.3.5 DcChipID (R: B5H)
This command reads the chip identification code and hardware version number. The
firmware must check this information to determine the supported functions and
features. This command accesses the DcChipID register, which is shown in
Table 138.
Code (Hex): B5 — read chip ID
Transaction — read 2 bytes (code or data)
Table 138: DcChipID register: bit allocation
Bit
15
14
13
12
11
10
9
8
Symbol
Reset
Access
Bit
CHIPIDH[7:0]
0
R
7
0
R
6
1
R
5
1
R
4
0
R
3
1
R
2
1
R
1
0
R
0
Symbol
Reset
Access
CHIPIDL[7:0]
0
0
1
1
0
0
0
0
R
R
R
R
R
R
R
R
9397 750 12337
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 03 — 06 January 2004
126 of 150
NXP [ NXP ]
