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ISP1160BD 参数 Datasheet PDF下载

ISP1160BD图片预览
型号: ISP1160BD
PDF下载: 下载PDF文件 查看货源
内容描述: 嵌入式通用串行总线主控制器 [Embedded Universal Serial Bus Host Controller]
分类和应用: 总线控制器微控制器和处理器外围集成电路数据传输时钟
文件页数/大小: 88 页 / 1864 K
品牌: NXP [ NXP ]
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ISP1160  
Embedded USB Host Controller  
Philips Semiconductors  
10.3.4 HcRhPortStatus[1:2] (R/W [1]:15H/95H, [2]: 16H/96H)  
The HcRhPortStatus[1:2] register is used to control and report port events on a  
per-port basis. NumberDownstreamPorts represents the number of HcRhPortStatus  
registers that are implemented in hardware. The lower word is used to reflect the port  
status, whereas the upper word reflects the status change bits. Some status bits are  
implemented with special write behavior. If a transaction (token through handshake)  
is in progress when a write to change port status occurs, the resulting port status  
change must be postponed until the transaction completes. Reserved bits should  
always be written logic 0.  
Code (Hex): [1] = 15, [2] = 16 — read  
Code (Hex): [1] = 95, [2] = 96 — write  
Table 34: HcRhPortStatus[1:2] register: bit allocation  
Bit  
31  
30  
29  
28  
27  
26  
25  
24  
Symbol  
Reset  
Access  
Bit  
reserved  
0
0
R/W  
22  
0
0
0
R/W  
19  
0
R/W  
18  
0
R/W  
17  
0
R/W  
16  
R/W  
23  
R/W  
21  
R/W  
20  
Symbol  
Reset  
Access  
Bit  
reserved  
0
PRSC  
0
OCIC  
0
PSSC  
0
PESC  
0
CSC  
0
0
0
R/W  
15  
R/W  
14  
R/W  
13  
R/W  
12  
R/W  
11  
R/W  
10  
R/W  
9
R/W  
8
Symbol  
Reset  
Access  
Bit  
reserved  
LSDA  
0
PPS  
0
0
R/W  
7
0
R/W  
6
0
R/W  
5
0
R/W  
4
0
R/W  
3
0
R/W  
2
R/W  
1
R/W  
0
Symbol  
Reset  
Access  
reserved  
0
PRS  
0
POCI  
0
PSS  
0
PES  
0
CCS  
0
0
0
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
Table 35: HcRshPortStatus[1:2] register: bit description  
Bit  
Symbol  
-
Description  
31 to 21  
20  
reserved  
PRSC  
PortResetStatusChange: This bit is set at the end of the 10 ms  
port reset signal. The HCD writes a logic 1 to clear this bit. Writing  
a logic 0 has no effect.  
0 — port reset is not complete  
1 — port reset is complete  
19  
OCIC  
PortOverCurrentIndicatorChange: This bit is valid only if  
overcurrent conditions are reported on a per-port basis. This bit is  
set when Root Hub changes the PortOverCurrentIndicator bit. The  
HCD writes a logic 1 to clear this bit. Writing a logic 0 has no  
effect.  
0 — no change in PortOverCurrentIndicator  
1 — PortOverCurrentIndicator has changed  
9397 750 11371  
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.  
Product data  
Rev. 04 — 04 July 2003  
53 of 88  
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