Philips Semiconductors
Product specification
N-channel enhancement mode
TrenchMOS
TM
transistor
IRFZ44N
1E-01
Sub-Threshold Conduction
100
IF/A
80
1E-02
2%
typ
98%
60
Tj/C =
40
175
25
1E-03
1E-04
20
1E-05
0
1E-06
0
0.2
0.4
0
1
2
3
4
5
0.6
0.8
VSDS/V
1
1.2
1.4
Fig.11. Sub-threshold drain current.
I
D
= f(V
GS)
; conditions: T
j
= 25 ˚C; V
DS
= V
GS
2.5
Fig.14. Typical reverse diode current.
I
F
= f(V
SDS
); conditions: V
GS
= 0 V; parameter T
j
WDSS%
120
110
100
90
80
2
Thousands pF
1.5
Ciss
1
70
60
50
40
30
20
Coss
Crss
.5
10
0
20
40
60
80
100
120
Tmb / C
140
160
180
0
0.01
0.1
1
VDS/V
10
100
Fig.12. Typical capacitances, C
iss
, C
oss
, C
rss
.
C = f(V
DS
); conditions: V
GS
= 0 V; f = 1 MHz
12
VGS/V
10
VDS = 14V
8
VDS = 44V
6
Fig.15. Normalised avalanche energy rating.
W
DSS
% = f(T
mb
); conditions: I
D
= 49 A
+
L
VDS
VGS
0
RGS
T.U.T.
R 01
shunt
VDD
-
-ID/100
4
2
0
0
10
20
QG/nC
30
40
50
Fig.13. Typical turn-on gate-charge characteristics.
V
GS
= f(Q
G
); conditions: I
D
= 50 A; parameter V
DS
Fig.16. Avalanche energy test circuit.
2
W
DSS
=
0.5
⋅
LI
D
⋅
BV
DSS
/(BV
DSS
−
V
DD
)
February 1999
5
Rev 1.000
PHILIPS [ NXP SEMICONDUCTORS ]
