NXP Semiconductors
HEF4081B
Quad 2-input AND gate
10. Dynamic characteristics
Table 7.
Dynamic characteristics
T
amb
= 25
C; for waveforms see
for test circuit see
unless otherwise specified.
Symbol Parameter
t
PHL
HIGH to LOW
propagation delay
Conditions
V
DD
10 V
15 V
t
PLH
LOW to HIGH
propagation delay
nA or nB to nY 5 V
10 V
15 V
t
THL
HIGH to LOW output
transition time
5V
10 V
15 V
t
TLH
LOW to HIGH output
transition time
5V
10 V
15 V
[1]
Extrapolation formula
28 ns + (0.55 ns/pF)C
L
14 ns + (0.23 ns/pF)C
L
12 ns + (0.16 ns/pF)C
L
18 ns + (0.55 ns/pF)C
L
9 ns + (0.23 ns/pF)C
L
7 ns + (0.16 ns/pF)C
L
10 ns + (1.0 ns/pF)C
L
9 ns + (0.42 ns/pF)C
L
6 ns + (0.28 ns/pF)C
L
10 ns + (1.00 ns/pF)C
L
9 ns + (0.42 ns/pF)C
L
6 ns + (0.28 ns/pF)C
L
Min
-
-
-
-
-
-
-
-
-
-
-
-
Typ
55
25
20
45
20
15
60
30
20
60
30
20
Max
110
50
40
90
40
30
120
60
40
120
60
40
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
nA or nB to nY 5 V
The typical value of the propagation delay and output transition time can be calculated with the extrapolation formula (C
L
in pF).
Table 8.
Dynamic power dissipation
V
SS
= 0 V; t
r
= t
f
20 ns; T
amb
= 25
C.
Symbol Parameter
P
D
dynamic power dissipation
V
DD
5V
Typical formula
P
D
= 450
f
i
+
(f
o
C
L
)
V
DD2
(W)
where:
f
i
= input frequency in MHz;
10 V P
D
= 2900
f
i
+
(f
o
C
L
)
V
DD2
(W) f
o
= output frequency in MHz;
15 V P
D
= 11700
f
i
+
(f
o
C
L
)
V
DD2
(W) C
L
= output load capacitance in pF;
(f
o
C
L
) = sum of the outputs;
V
DD
= supply voltage in V.
HEF4081B
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© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 8 — 15 December 2015
5 of 11
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