Philips Semiconductors
Product specification
HEF4069UB
gates
Hex inverter
AC CHARACTERISTICS
VSS = 0 V; Tamb = 25 °C; CL = 50 pF; input transition times ≤ 20 ns
VDD
TYPICAL EXTRAPOLATION FORMULA
SYMBOL TYP. MAX.
V
Propagation delays
In → On
HIGH to LOW
5
10
15
5
45
20
15
40
20
15
60
30
20
60
30
20
90 ns
40 ns
25 ns
80 ns
40 ns
30 ns
120 ns
60 ns
40 ns
120 ns
60 ns
40 ns
18 ns + (0,55 ns/pF) CL
9 ns + (0,23 ns/pF) CL
7 ns + (0,16 ns/pF) CL
13 ns + (0,55 ns/pF) CL
9 ns + (0,23 ns/pF) CL
7 ns + (0,16 ns/pF) CL
10 ns + (1,0 ns/pF) CL
9 ns + (0,42 ns/pF) CL
6 ns + (0,28 ns/pF) CL
10 ns + (1,0 ns/pF) CL
9 ns + (0,42 ns/pF) CL
6 ns + (0,28 ns/pF) CL
tPHL
tPLH
tTHL
tTLH
LOW to HIGH
10
15
5
Output transition times
HIGH to LOW
10
15
5
LOW to HIGH
10
15
VDD
V
TYPICAL FORMULA FOR P (µW)
2
Dynamic power
dissipation per
package (P)
5
10
15
600 fi + ∑ (foCL) × VDD
where
2
4 000 fi + ∑ (foCL) × VDD
fi = input freq. (MHz)
fo = output freq. (MHz)
CL = load capacitance (pF)
∑ (foCL) = sum of outputs
VDD = supply voltage (V)
2
22 000 fi + ∑ (foCL) × VDD
January 1995
3
NXP [ NXP ]
