NXP Semiconductors
HEF4053B-Q100
Triple single-pole double-throw analog switch
6.2 Pin description
Table 2.
Symbol
E
V
EE
V
SS
S1, S2, S3
1Y0, 2Y0, 3Y0
1Y1, 2Y1, 3Y1
1Z, 2Z, 3Z
V
DD
Pin description
Pin
6
7
8
11, 10, 9
12, 2, 5
13, 1, 3
14, 15, 4
16
Description
enable input (active LOW)
supply voltage
ground supply voltage
select input
independent input or output
independent input or output
independent output or input
supply voltage
7. Functional description
Table 3.
Inputs
E
L
L
H
[1]
Function table
Channel on
Sn
L
H
X
nY0 to nZ
nY1 to nZ
switches OFF
H = HIGH voltage level; L = LOW voltage level; X = don’t care.
8. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to V
SS
= 0 V (ground).
Symbol
V
DD
V
EE
I
IK
V
I
I
I/O
I
DD
T
stg
T
amb
P
tot
Parameter
supply voltage
supply voltage
input clamping current
input voltage
input/output current
supply current
storage temperature
ambient temperature
total power dissipation
T
amb
=
40 C
to +125
C
SO16 package
TSSOP16 package
P
[1]
Conditions
referenced to V
DD
pins Sn and E;
V
I
<
0.5
V or V
I
> V
DD
+ 0.5 V
Min
0.5
18
-
0.5
-
-
65
40
-
-
-
Max
+18
+0.5
10
V
DD
+ 0.5
10
50
+150
+125
500
500
100
Unit
V
V
mA
V
mA
mA
C
C
mW
mW
mW
power dissipation
per output
To avoid drawing V
DD
current out of terminal Z, when switch current flows into terminals nYn, the voltage drop across the bidirectional
switch must not exceed 0.4 V. If the switch current flows into terminal Z, no V
DD
current will flow out of terminals nYn, and in this case
there is no limit for the voltage drop across the switch, but the voltages at nYn and Z may not exceed V
DD
or V
EE
.
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
HEF4053B_Q100
Product data sheet
Rev. 1 — 22 February 2013
4 of 19
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