HEF4051B
NXP Semiconductors
8-channel analog multiplexer/demultiplexer
6. Pinning information
6.1 Pinning
HEF4051B
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Y4
Y6
Z
V
DD
Y2
Y1
Y0
Y3
S1
S2
S3
HEF4051B
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Y4
Y6
Z
V
DD
Y7
Y5
E
Y2
Y1
Y0
Y3
S1
S2
S3
Y7
Y5
E
V
EE
SS
V
EE
SS
V
V
001aak508
001aac282
Fig 6. Pin configuration SOT38-4 and SOT109-1
Fig 7. Pin configuration SOT338-1 and SOT403-1
6.2 Pin description
Table 2.
Symbol
E
Pin description
Pin
Description
6
enable input (active LOW)
supply voltage
VEE
7
VSS
8
ground supply voltage
select input
S1, S2, S3
11, 10, 9
Y0, Y1, Y2, Y3, Y4, Y5, Y6, Y7 13, 14, 15, 12, 1, 5, 2, 4 independent input or output
Z
3
common output or input
supply voltage
VDD
16
HEF4051B
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 10 — 17 November 2011
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