欢迎访问ic37.com |
会员登录 免费注册
发布采购

HEF4051BTS 参数 Datasheet PDF下载

HEF4051BTS图片预览
型号: HEF4051BTS
PDF下载: 下载PDF文件 查看货源
内容描述: 8通道模拟多路复用器/ [8-channel analog multiplexer/demultiplexer]
分类和应用: 复用器光电二极管
文件页数/大小: 23 页 / 174 K
品牌: NXP [ NXP ]
 浏览型号HEF4051BTS的Datasheet PDF文件第9页浏览型号HEF4051BTS的Datasheet PDF文件第10页浏览型号HEF4051BTS的Datasheet PDF文件第11页浏览型号HEF4051BTS的Datasheet PDF文件第12页浏览型号HEF4051BTS的Datasheet PDF文件第14页浏览型号HEF4051BTS的Datasheet PDF文件第15页浏览型号HEF4051BTS的Datasheet PDF文件第16页浏览型号HEF4051BTS的Datasheet PDF文件第17页  
HEF4051B  
NXP Semiconductors  
8-channel analog multiplexer/demultiplexer  
11.2 Additional dynamic parameters  
Table 11. Additional dynamic characteristics  
VSS = VEE = 0 V; Tamb = 25 C.  
Symbol  
Parameter  
Conditions  
VDD  
Typ  
0.25  
0.04  
0.04  
13  
Max  
Unit  
%
[1]  
[1]  
[1]  
[1]  
[1]  
[1]  
[1]  
THD  
total harmonic distortion  
see Figure 17; RL = 10 k; CL = 15 pF; 5 V  
channel ON; VI = 0.5VDD (p-p);  
fi = 1 kHz  
-
-
-
-
-
-
-
10 V  
%
15 V  
5 V  
%
f(3dB)  
3 dB frequency response see Figure 18; RL = 1 k; CL = 5 pF;  
MHz  
MHz  
MHz  
dB  
channel ON; VI = 0.5VDD (p-p)  
10 V  
15 V  
10 V  
40  
70  
iso  
isolation (OFF-state)  
crosstalk voltage  
crosstalk  
see Figure 19; fi = 1 MHz; RL = 1 k;  
CL = 5 pF; channel OFF;  
VI = 0.5VDD (p-p)  
50  
Vct  
digital inputs to switch; see Figure 20; 10 V  
RL = 10 k; CL = 15 pF;  
E or Sn = VDD (square-wave)  
50  
-
mV  
dB  
[1]  
Xtalk  
between switches; see Figure 21;  
fi = 1 MHz; RL = 1 k;  
10 V  
50  
-
VI = 0.5VDD (p-p)  
[1] fi is biased at 0.5 VDD; VI = 0.5VDD (p-p).  
Table 12. Dynamic power dissipation PD  
PD can be calculated from the formulas shown; VEE = VSS = 0 V; tr = tf 20 ns; Tamb = 25 C.  
Symbol  
Parameter  
VDD  
5 V  
Typical formula for PD (W)  
PD = 1000 fi + (fo CL) VDD  
PD = 5500 fi + (fo CL) VDD  
where:  
2
2
PD  
dynamic power  
dissipation  
fi = input frequency in MHz;  
fo = output frequency in MHz;  
10 V  
15 V  
2
CL = output load capacitance in pF;  
DD = supply voltage in V;  
(CL fo) = sum of the outputs.  
PD = 15000 fi + (fo CL) VDD  
V
11.2.1 Test circuits  
V
V
DD  
DD  
S1 to S3  
S1 to S3  
V
or V  
V
or V  
DD  
DD  
SS  
SS  
Z
E
Yn  
Z
E
Yn  
V
= V  
V
= V  
SS EE  
SS  
EE  
V
V
SS  
SS  
R
L
C
L
R
L
C
L
D
dB  
f
f
i
i
001aak516  
001aak517  
Fig 17. Test circuit for measuring total harmonic  
distortion  
Fig 18. Test circuit for measuring frequency response  
HEF4051B  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 10 — 17 November 2011  
13 of 23