HEF40106B-Q100
NXP Semiconductors
Hex inverting Schmitt trigger
6.2 Pin description
Table 2.
Symbol
1A to 6A
1Y to 6Y
VDD
Pin description
Pin
Description
input
1, 3, 5, 9, 11, 13
2, 4, 6, 8, 10, 12
output
14
7
supply voltage
ground (0 V)
VSS
7. Functional description
Table 3.
Function table[1]
Input
nA
L
Output
nY
H
H
L
[1] H = HIGH voltage level; L = LOW voltage level.
8. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS = 0 V (ground).
Symbol Parameter
Conditions
Min
0.5
-
Max
+18
Unit
V
VDD
IIK
supply voltage
input clamping current
input voltage
VI < 0.5 V or VI > VDD + 0.5 V
VO < 0.5 V or VO > VDD + 0.5 V
10
mA
V
VI
0.5
-
VDD + 0.5
10
IOK
II/O
output clamping current
input/output current
supply current
mA
mA
mA
C
-
10
IDD
Tstg
Tamb
Ptot
-
50
storage temperature
ambient temperature
total power dissipation
65
40
+150
+125
C
Tamb = 40 C to +125 C
SO14
[1]
[2]
-
-
-
500
500
100
mW
mW
mW
TSSOP14
P
power dissipation
per output
[1] For SO14 packages: above Tamb = 70 C, Ptot derates linearly with 8 mW/K.
[2] For TSSOP14 packages: above Tamb = 60 C, Ptot derates linearly with 5.5 mW/K.
HEF40106B_Q100
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© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 7 August 2012
3 of 15
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