欢迎访问ic37.com |
会员登录 免费注册
发布采购

74LVC14APW-Q100 参数 Datasheet PDF下载

74LVC14APW-Q100图片预览
型号: 74LVC14APW-Q100
PDF下载: 下载PDF文件 查看货源
内容描述: [LVC/LCX/Z SERIES, HEX 1-INPUT INVERT GATE, PDSO14, 4.40 MM, PLASTIC, MO-153, SOT402-1, TSSOP-14]
分类和应用: 输入元件光电二极管逻辑集成电路
文件页数/大小: 17 页 / 142 K
品牌: PHILIPS [ NXP SEMICONDUCTORS ]
 浏览型号74LVC14APW-Q100的Datasheet PDF文件第1页浏览型号74LVC14APW-Q100的Datasheet PDF文件第2页浏览型号74LVC14APW-Q100的Datasheet PDF文件第4页浏览型号74LVC14APW-Q100的Datasheet PDF文件第5页浏览型号74LVC14APW-Q100的Datasheet PDF文件第6页浏览型号74LVC14APW-Q100的Datasheet PDF文件第7页浏览型号74LVC14APW-Q100的Datasheet PDF文件第8页浏览型号74LVC14APW-Q100的Datasheet PDF文件第9页  
NXP Semiconductors
74LVC14A-Q100
Hex inverting Schmitt trigger with 5 V tolerant input
6. Pinning information
6.1 Pinning
/9&$4
WHUPLQDO 
LQGH[ DUHD
<
$
<






*1'
<

*1'


 9
&&
 $
 <
 $
 <

$
DDD
/9&$4
$
<
$
<
$
<
*1'







DDD
$
<
 9
&&
 $
 <
 $
 <


$
<
7UDQVSDUHQW WRS YLHZ
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 4.
Pin configuration SO14 and TSSOP14
Fig 5.
Pin configuration DHVQFN14
6.2 Pin description
Table 2.
Symbol
1A, 2A, 3A, 4A, 5A, 6A
1Y, 2Y, 3Y, 4Y, 5Y, 6Y
GND
V
CC
Pin description
Pin
1, 3, 5, 9, 11, 13
2, 4, 6, 8, 10, 12
7
14
Description
data input
data output
ground (0 V)
supply voltage
7. Functional description
Table 3.
Input nA
L
H
[1]
H = HIGH voltage level; L = LOW voltage level
Function table
Output nY
H
L
74LVC14A_Q100
All information provided in this document is subject to legal disclaimers.

$
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 7 August 2012
3 of 17