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74LVC14APW-Q100 参数 Datasheet PDF下载

74LVC14APW-Q100图片预览
型号: 74LVC14APW-Q100
PDF下载: 下载PDF文件 查看货源
内容描述: [LVC/LCX/Z SERIES, HEX 1-INPUT INVERT GATE, PDSO14, 4.40 MM, PLASTIC, MO-153, SOT402-1, TSSOP-14]
分类和应用: 输入元件光电二极管逻辑集成电路
文件页数/大小: 17 页 / 142 K
品牌: NXP [ NXP ]
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74LVC14A-Q100  
NXP Semiconductors  
Hex inverting Schmitt trigger with 5 V tolerant input  
Table 7.  
Dynamic characteristics …continued  
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 7.  
Symbol Parameter  
Conditions  
40 C to +85 C  
40 C to +125 C Unit  
Min  
Typ[1]  
Max  
Min  
Max  
[4]  
CPD  
power dissipation  
capacitance  
per buffer; VI = GND to VCC  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
-
-
-
9.0  
-
-
-
-
-
-
-
-
-
pF  
pF  
pF  
12.5  
15.6  
VCC = 3.0 V to 3.6 V  
[1] Typical values are measured at Tamb = 25 C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V, and 3.3 V respectively.  
[2] tpd is the same as tPLH and tPHL  
[3] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.  
[4] PD is used to determine the dynamic power dissipation (PD in W).  
.
C
PD = CPD VCC2 fi N + (CL VCC2 fo) where:  
fi = input frequency in MHz; fo = output frequency in MHz  
CL = output load capacitance in pF  
VCC = supply voltage in Volts  
N = number of inputs switching  
(CL VCC2 fo) = sum of the outputs.  
12. Waveforms  
V
I
V
V
M
nA input  
M
GND  
t
t
PHL  
PLH  
V
OH  
V
V
M
nY output  
M
V
mna344  
OL  
VM = 1.5 V at VCC 2.7 V  
VM = 0.5 VCC at VCC < 2.7 V.  
OL and VOH are typical output voltage levels that occur with the output load.  
V
Fig 6. Propagation delay input (nA) to output (nY)  
74LVC14A_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 7 August 2012  
6 of 17  
 
 
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