NXP Semiconductors
74HC86; 74HCT86
Quad 2-input EXCLUSIVE-OR gate
5. Pinning information
5.1 Pinning
1A
1B
1Y
2A
2B
2Y
GND
1
2
3
4
5
6
7
001aad103
14 V
CC
13 4B
12 4A
86
11 4Y
10 3B
9
8
3A
3Y
Fig 4.
Pin configuration DIP14, SO14 and (T)SSOP14
5.2 Pin description
Table 2.
Symbol
1A to 4A
1B to 4B
1Y to 4Y
GND
V
CC
Pin description
Pin
1, 4, 9, 12
2, 5, 10, 13
3, 6, 8, 11
7
14
Description
data input
data input
data output
ground (0 V)
supply voltage
6. Functional description
Table 3.
Input nA
L
L
H
H
[1]
H = HIGH voltage level;
L = LOW voltage level.
Function table
Input nB
L
H
L
H
Output nY
L
H
H
L
74HC_HCT86
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© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 3 — 27 August 2012
3 of 16
PHILIPS [ NXP SEMICONDUCTORS ]
