74HC86; 74HCT86
NXP Semiconductors
Quad 2-input EXCLUSIVE-OR gate
t
W
V
I
90 %
negative
pulse
V
V
V
V
M
M
10 %
GND
t
t
r
f
t
t
f
r
V
I
90 %
positive
pulse
M
M
10 %
GND
t
W
V
CC
V
V
O
I
G
DUT
R
T
C
L
001aah768
Test data is given in Table 9.
Definitions test circuit:
RT = termination resistance should be equal to output impedance Zo of the pulse generator.
CL = load capacitance including jig and probe capacitance.
Fig 6. Load circuitry for measuring switching times
Table 9.
Type
Test data
Input
VI
Load
Test
tr, tf
CL
74HC86
VCC
3.0 V
6.0 ns
6.0 ns
15 pF, 50 pF
15 pF, 50 pF
tPLH, tPHL
tPLH, tPHL
74HCT86
74HC_HCT86
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© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 3 — 27 August 2012
8 of 16
NXP [ NXP ]
