Philips Semiconductors
Product specification
Dual D-type flip-flop with set and reset;
positive-edge trigger
PINNING
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
SYMBOL
1RD
1D
1CP
1SD
1Q
1Q
GND
2Q
2Q
2SD
2CP
2D
2RD
V
CC
data input
clock input (LOW-to-HIGH, edge-triggered)
asynchronous set-direct input (active LOW)
true flip-flop output
complement flip-flop output
ground (0 V)
complement flip-flop output
true flip-flop output
asynchronous set-direct input (active LOW)
clock input (LOW-to-HIGH, edge-triggered)
data input
asynchronous reset-direct input (active LOW)
positive supply voltage
DESCRIPTION
asynchronous reset-direct input (active LOW)
74HC74; 74HCT74
handbook, halfpage
handbook, halfpage
1RD
1
VCC
14
13
12
2RD
2D
2CP
2SD
2Q
1RD
1D
1CP
1SD
1Q
1Q
GND
1
2
3
4
5
6
7
MNA417
14 VCC
13 2RD
12 2D
1D
1CP
1SD
1Q
2
3
4
5
6
7
Top view
GND
8
2Q
74
11 2CP
10 2SD
GND
(1)
11
10
9
9
2Q
1Q
8 2Q
MNB038
(1) The die substrate is attached to this pad using conductive die
attach material. It can not be used as a supply pin or input.
Fig.1
Pin configuration DIP14, SO14 and
(T)SSOP14.
Fig.2 Pin configuration DHVQFN14.
2003 Jul 10
4
PHILIPS [ NXP SEMICONDUCTORS ]
