Philips Semiconductors
Product specification
Dual JK flip-flop with set and reset;
positive-edge trigger
PIN DESCRIPTION
PIN NO.
1, 15
2, 14, 3, 13
4, 12
5, 11
6, 10
7, 9
8
16
SYMBOL
1R
D
, 2R
D
1J, 2J, 1K, 2K
1CP, 2CP
1S
D
, 2S
D
1Q, 2Q
1Q, 2Q
GND
V
CC
NAME AND FUNCTION
74HC/HCT109
asynchronous reset-direct input (active LOW)
synchronous inputs; flip-flops 1 and 2
clock input (LOW-to-HIGH, edge-triggered)
asynchronous set-direct input (active LOW)
true flip-flop outputs
complement flip-flop outputs
ground (0 V)
positive supply voltage
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
1997 Nov 25
3