74HCT08BQ-Q100 参数 Datasheet PDF下载

NXP Semiconductors

74HC08-Q100; 74HCT08-Q100

Quad 2-input AND gate

5.2 Pin description

Table 2.

Symbol

1A to 4A

1B to 4B

1Y to 4Y

GND

V

CC

Pin description

Pin

1, 4, 9, 12

2, 5, 10,13

3, 6, 8, 11

7

14

Description

data input

data input

data output

ground (0 V)

supply voltage

6. Functional description

Table 3.

Input

nA

L

L

H

H

[1]

H = HIGH voltage level;

L = LOW voltage level;

X = don’t care.

Function table

Output

nB

L

H

L

H

nY

L

L

L

H

7. Limiting values

Table 4.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).

Symbol

V

CC

I

IK

I

OK

I

O

I

CC

I

GND

T

stg

P

tot

[1]

[2]

Parameter

supply voltage

input clamping current

output clamping current

output current

supply current

ground current

storage temperature

total power dissipation

Conditions

V

I

<

0.5

V or V

I

> V

CC

+ 0.5 V

V

O

<

0.5

V or V

O

> V

CC

+ 0.5 V

0.5

V < V

O

< V

CC

+ 0.5 V

Min

0.5

-

-

-

-

50

65

Max

+7

20

20

25

50

-

+150

500

Unit

V

mA

mA

mA

mA

mA

C

mW

-

The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

For SO14 package: P

tot

derates linearly with 8 mW/K above 70

C.

For TSSOP14 packages: P

tot

derates linearly with 5.5 mW/K above 60

C.

For DHVQFN14 packages: P

tot

derates linearly with 4.5 mW/K above 60

C.

74HC_HCT08_Q100

All information provided in this document is subject to legal disclaimers.

© NXP B.V. 2012. All rights reserved.

Product data sheet

Rev. 1 — 16 July 2012

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