Philips Semiconductors
Product specification
8-bit serial-in/serial or parallel-out shift
register with output latches; 3-state
FUNCTION TABLE
INPUTS
SH
CP
X
X
X
↑
ST
CP
X
↑
X
X
OE
L
L
H
L
MR
L
L
L
H
D
S
X
X
X
H
OUTPUTS
74HC/HCT595
FUNCTON
Q
7
’
L
L
L
Q
6
’
Q
N
NC
L
Z
NC
a LOW level on MR only affects the shift registers
empty shift register loaded into storage register
shift register clear. Parallel outputs in high-impedance
OFF-state
logic high level shifted into shift register stage 0. Contents
of all shift register stages shifted through, e.g. previous
state of stage 6 (internal Q
6
’) appears on the serial output
(Q
7
’)
contents of shift register stages (internal Q
n
’) are
transferred to the storage register and parallel output
stages
contents of shift register shifted through. Previous
contents of the shift register is transferred to the storage
register and the parallel output stages.
X
↑
L
H
X
NC
Q
n
’
↑
↑
L
H
X
Q
6
’
Q
n
’
Notes
1. H = HIGH voltage level; L = LOW voltage level
↑
= LOW-to-HIGH transition;
↓
= HIGH-to-LOW transition
Z = high-impedance OFF-state; NC = no change
X = don’t care.
1998 Jun 04
6