Philips Semiconductors
Product specification
8-bit serial-in/serial or parallel-out shift
register with output latches; 3-state
74HC/HCT595
FUNCTION TABLE
INPUTS
OE
OUTPUTS
FUNCTON
SHCP
STCP
MR
DS
Q7’
QN
X
X
X
X
↑
L
L
L
L
L
X
X
X
L
L
L
NC a LOW level on MR only affects the shift registers
L
Z
empty shift register loaded into storage register
X
H
shift register clear. Parallel outputs in high-impedance
OFF-state
↑
X
L
H
H
Q6’
NC logic high level shifted into shift register stage 0. Contents
of all shift register stages shifted through, e.g. previous
state of stage 6 (internal Q6’) appears on the serial output
(Q7’)
X
↑
↑
L
L
H
H
X
X
NC
Q6’
Qn’ contents of shift register stages (internal Qn’) are
transferred to the storage register and parallel output
stages
↑
Qn’ contents of shift register shifted through. Previous
contents of the shift register is transferred to the storage
register and the parallel output stages.
Notes
1. H = HIGH voltage level; L = LOW voltage level
↑ = LOW-to-HIGH transition; ↓ = HIGH-to-LOW transition
Z = high-impedance OFF-state; NC = no change
X = don’t care.
1998 Jun 04
6
NXP [ NXP ]
