NXP Semiconductors
74HC595-Q100; 74HCT595-Q100
8-bit serial-in, serial or parallel-out shift register with output latches;
3-state
SHCP
DS
STCP
MR
OE
Q0
Q1
Z-state
Z-state
Q6
Q7
Q7S
Z-state
Z-state
mna556
Fig 8.
Timing diagram
8. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
I
IK
I
OK
I
O
Parameter
supply voltage
input clamping current
output clamping current
output current
V
I
<
0.5
V or V
I
> V
CC
+ 0.5 V
V
O
<
0.5
V or V
O
> V
CC
+ 0.5 V
V
O
=
0.5
V to (V
CC
+ 0.5 V)
pin Q7S
pins Qn
I
CC
I
GND
T
stg
P
tot
supply current
ground current
storage temperature
total power dissipation
SO16 package
(T)SSOP16 package
DHVQFN16 package
[1]
[2]
[3]
For SO16 package: P
tot
derates linearly with 8 mW/K above 70
C.
For (T)SSOP16 package: P
tot
derates linearly with 5.5 mW/K above 60
C.
For DHVQFN16 package: P
tot
derates linearly with 4.5 mW/K above 60
C.
Conditions
Min
0.5
-
-
-
-
-
70
65
-
-
-
Max
+7
20
20
25
35
70
-
+150
500
500
500
Unit
V
mA
mA
mA
mA
mA
mA
C
mW
mW
mW
74HC_HCT595_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 10 April 2013
6 of 23
PHILIPS [ NXP SEMICONDUCTORS ]
