Philips Semiconductors
Product specification
Presettable synchronous 4-bit binary
counter; asynchronous reset
74HC/HCT161
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
PIN DESCRIPTION
PIN NO.
SYMBOL
NAME AND FUNCTION
1
MR
asynchronous master reset (active LOW)
clock input (LOW-to-HIGH, edge-triggered)
data inputs
2
CP
3, 4, 5, 6
D0 to D3
CEP
GND
PE
7
count enable input
8
ground (0 V)
9
parallel enable input (active LOW)
count enable carry input
flip-flop outputs
10
CET
Q0 to Q3
TC
14, 13, 12, 11
15
16
terminal count output
VCC
positive supply voltage
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
December 1990
3
NXP [ NXP ]
