NXP Semiconductors
74HC138; 74HCT138
3-to-8 line decoder/demultiplexer; inverting
5.2 Pin description
Table 2.
Symbol
A0, A1, A2
E1, E2
E3
Y0, Y1, Y2, Y3, Y4, Y5, Y6, Y7
GND
V
CC
Pin description
Pin
1, 2, 3
4, 5
6
15, 14, 13, 12, 11, 10, 9, 7
8
16
Description
address input A0, A1, A2
enable input E1, E2 (active LOW)
enable input E3 (active HIGH)
output Y0, Y1, Y2, Y3, Y4, Y5, Y6, Y7 (active LOW)
ground (0 V)
positive supply voltage
6. Functional description
Table 3.
Control
E1
H
X
X
L
E2
X
H
X
L
E3
X
X
L
H
L
L
L
L
H
H
H
H
[1]
H = HIGH voltage level;
L = LOW voltage level;
X = don’t care.
Function table
Input
A2
X
A1
X
A0
X
Output
Y7
H
Y6
H
Y5
H
Y4
H
Y3
H
Y2
H
Y1
H
Y0
H
L
L
H
H
L
L
H
H
L
H
L
H
L
H
L
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
L
H
H
H
H
H
H
L
H
H
H
H
H
H
L
H
H
H
H
H
H
L
H
H
H
H
H
H
L
H
H
H
H
H
H
L
H
H
H
H
H
H
L
H
H
H
H
H
H
H
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
I
IK
I
OK
I
O
I
CC
I
GND
T
stg
Parameter
supply voltage
input clamping current
output clamping current
output current
quiescent supply current
ground current
storage temperature
V
I
<
−0.5
V or V
I
> V
CC
+ 0.5 V
V
O
<
−0.5
V or V
O
> V
CC
+ 0.5 V
V
O
=
−0.5
V to (V
CC
+ 0.5 V)
Conditions
Min
−0.5
-
-
-
-
-
−65
Max
+7
±20
±20
±25
50
−50
+150
Unit
V
mA
mA
mA
mA
mA
°C
74HC_HCT138
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 4 — 27 June 2012
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