PE3335
Product Specification
Functional Description
The PE3335 consists of a prescaler, counters, a
phase detector, a charge pump and control logic.
The dual modulus prescaler divides the VCO
frequency by either 10 or 11, depending on the
value of the modulus select. Counters “R” and “M”
divide the reference and prescaler output,
detector generates up and down frequency control
signals. The control logic includes a selectable
chip interface. Data can be written via serial bus,
parallel bus, or hardwired direct to the pins. There
are also various operational and test modes and
lock detect.
respectively, by integer values stored in a 20-bit
register. An additional counter (“A”) is used in
the modulus select logic. The phase-frequency
Figure 3. Functional Block Diagram
R Counter
fr
fc
(6-bit)
PD_U
R(5:0)
M(8:0)
A(3:0)
D(7:0)
Sdata
Phase
Control
Logic
Charge
PD_D
CP
Detector
Pump
Control
Pins
LD
Cext
2 kΩ
Modulus
Select
Fin
Fin
10/11
M Counter
(9-bit)
fp
Prescaler
Document No. 70-0049-02 │ www.psemi.com
©2005 Peregrine Semiconductor Corp. All rights reserved.
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