MN3674
s
Timing Diagram
•
I/O timing (1) (without 1-line delay operation)
ø
SG1
ø
V
ø
SG2
ø
1
ø
2
ø
R
0
1
2
17 18 19 20 21 22
1041
1043 1045
1042 1044 1046
CCD Linear Image Sensor
DS
1
OS
1
B
1
B
29
B
31
D
1
D
3
G
1
G
2
G
3
D
G
1022
G
1024 5
D
7
G
1021
G
1023
Blank feed level
DS
2
OS
2
B
2
B
30
B
32
D
2
D
4
R
1
B
1
R
2
B
511
B
512
D
6
D
8
Note) Repeat the transfer
R
511
R
512
pulses (ø
1
, ø
2
) for
more than 1046
periods.
B
1
to B
32
: Black reference pixels
D
1
to D
8
: Dummy invalid pixels
•
I/O timing (2) (during 1-line delay operation)
ø
SG1
ø
V
ø
SG2
ø
1
ø
2
ø
R
0
1
2
17 18 19 20 21 22
1041
1043 1045
1042 1044 1046
DS
1
OS
1
B
1
B
29
B
31
D
1
D
3
G
1
G
2
G
3
D
G
1022
G
1024 5
D
7
G
1021
G
1023
Blank feed level
DS
2
OS
2
B
2
B
30
B
32
D
2
D
4
R
1
B
1
R
2
B
511
B
512
D
6
D
8
R
511
R
512
Note) Repeat the transfer
pulses (ø
1
, ø
2
) for
more than 1046
periods.
B
1
to B
32
: Black reference pixels
D
1
to D
8
: Dummy invalid pixels
* OS
2
outputs the previous line signal.
PANASONIC [ PANASONIC SEMICONDUCTOR ]
