CCD Linear Image Sensor
s
Construction of the Image Sensor
MN3674
The MN3674 can be made up of the three sections of—a) photo detector region, b) CCD transfer region (shift register), and c)
output region.
a) Photo detector region
•
The photoelectric conversion device consists of an 11µm floating photodiode and a 3µm channel stopper (isolation region) per
pixel, and such pixels are arranged in a linear row with a pitch of 14µm along the main scanning direction.
•
The R-B row has 512 pixels each of the red and blue colors arranged alternatingly, and the G row has1024 pixels. The R-B row
and G row are placed with a spacing of one line (14µm) along the sideways scanning direction. The pixels of the G row are
displaced by half the pixel pitch (7µm) relative to the pixels of the R-B row in the main scanning direction.
1 1 2 2
· · · · · · ·
512 512
R B R B
· · · · · ·
R B
G G G G
· · · · · ·
G G
1 2 3 4
· · · · · ·
1023 1024
14µm 14µm 14µm
14µm
•
A one line analog delay memory is built in the chip in order to compensate for the difference in the positions of the R-B and G
rows in the sideways scanning direction.
•
The photodetector window is a rectangle of dimensions 9µm (Horizontal)
×
11µm (Vertical), and the areas other than the
photodetector window are optically shielded.
•
The photodetector region has a total of 32 optically shielded (black reference) pixels that can be used as the black level reference,
with 16 pixels each for the R-B row and the G row.
b) CCD Transfer region (shift register)
•
The signal charges obtained by photoelectric conversion are transferred to the CCD transfer regions of the respective colors
during the period when the shift gate (ø
SG
) is at the High level. The signal charges transferred to this analog shift register are
successively transferred to the output region.
•
A buried type CCD that can be driven by a two phase clock (ø
1
, ø
2
) is used for the analog shift register.
c) Output region
•
The signal charge transferred to the output region is first sent to the charge to voltage conversion region where it is converted
into a voltage level corresponding to the amount of the signal charge, and then output after impedance conversion in a two stage
source follower amplifier.
•
The DC level component not containing the optical signal and the clock noise component are output at the DS pin.
•
It is possible to obtain a signal with a high S/N ratio with reduced clock noise, etc., by carrying out differential amplification of
the OS and DS outputs externally.
s
1-Line delay analog memory
•
In order to compensate for the distance between the photodiode rows for the R, B colors and the G color, the device has a built in
analog memory that can store the signals of one line. It is possible to select either to use or not use the delay memory by the
timings of the pulses ø
V
, ø
SG1
, and ø
SG2
, and the two types of read out operation of 512 pixel operation and pseudo 1024 pixel
operation can be obtained accordingly.
(1) 512-pixel operation (no delay memory)
R B
G G
is taken as one pixel thereby making this device a 512-pixel color CCD.
(Each pixel of the color sensor will be a parallelogram of 28µm (horizontal)
×
28µm (vertical).)
Sideways scanning
direction
(2) Pseudo 1024-pixel operaation (delay memory is used)
2
4
1022
A 1-line delay operation and interpolation signal processing
1
3
5 · · · · · · 1023
shown in the figure at left are made for the R-B colors.
R B R B R B ··· B R B
G G G G G G ··· G G G
1 2 3 4 5 6 · · · 1022 1024
1023
B R
R B
G
G
or
becomes one pixel during color sensing operation.
* Since the signal from the R-B row gets delayed, configure the optical system and mechanisms so that the sideways scanning is
done first from the R-B row. The R-B row and the G row of the same line will be read out due to the one line delay.
The weighted center of one color pixel can be considered to be at the position of the G pixel.
PANASONIC [ PANASONIC SEMICONDUCTOR ]
