Philips Semiconductors
Product specification
Dual 2-input NOR gate
74LVC2G02
VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm
SOT765-1
D
E
A
X
c
y
HE
v
M
A
Z
8
5
Q
A
pin 1 index
A2
A1
(A3)
θ
Lp
L
1
e
bp
4
w
M
detail X
0
2.5
scale
5 mm
DIMENSIONS (mm are the original dimensions)
UNIT
mm
A
max.
1
A1
0.15
0.00
A2
0.85
0.60
A3
0.12
bp
0.27
0.17
c
0.23
0.08
D
(1)
2.1
1.9
E
(2)
2.4
2.2
e
0.5
HE
3.2
3.0
L
0.4
Lp
0.40
0.15
Q
0.21
0.19
v
0.2
w
0.13
y
0.1
Z
(1)
0.4
0.1
θ
8°
0°
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT765-1
REFERENCES
IEC
JEDEC
MO-187
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
02-06-07
2004 Sep 15
13
PANASONIC [ PANASONIC SEMICONDUCTOR ]
