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TOP232Y 参数 Datasheet PDF下载

TOP232Y图片预览
型号: TOP232Y
PDF下载: 下载PDF文件 查看货源
内容描述: 的TOPSwitch - FX系列设计灵活, EcoSmart® ,集成离线式开关 [TOPSwitch-FX Family Design Flexible, EcoSmart®, Integrated Off-line Switcher]
分类和应用: 开关
文件页数/大小: 36 页 / 644 K
品牌: PAM [ POWER ANALOG MICOELECTRONICS ]
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TOP232-234  
voltage reaches the under-voltage threshold. At power down,  
UV prevents auto-restart attempts after the output goes out of  
regulation. This eliminates power down glitches caused by the  
slowdischargeofinputstoragecapacitorpresentinapplications  
such as standby supplies. A single resistor connected from the  
MULTI-FUNCTION pin to the rectified DC high voltage bus  
sets UV threshold during power up. Once the power supply is  
successfully turned on, UV is disabled to allow extended input  
voltage operating range. Input voltage is not checked again  
until the power supply loses regulation and attempts another  
turn-on. This is accomplished by enabling the UV comparator  
only when the divide-by-8 counter used in auto-restart reaches  
full count (S7) which is also the state that the counter is reset to  
at power up (see Figure 5). The UV feature can be disabled  
independent of OV feature as shown in Figure 16.  
feed forward operation is illustrated in Figure 4 by the different  
values of IM. Note that for the same CONTROL pin current,  
higher line voltage results in smaller operating duty cycle. As  
an added safety measure, the maximum duty cycle DCMAX is  
alsoreducedfrom78%(typical)atavoltageslightlyhigherthan  
the UV threshold to 38% (typical) at the OV threshold (see  
Figures 4, 8). DCMAX of 38% at the OV threshold was chosen  
to ensure that the power capability of the TOPSwitch-FX is not  
restricted by this feature under normal operation.  
Remote ON/OFF and Synchronization  
TOPSwitch-FX can be turned on or off by controlling the  
current into or out from the MULTI-FUNCTION pin (see  
Figure8). ThisallowseasyimplementationofremoteON/OFF  
controlofTOPSwitch-FXinseveraldifferentways. Atransistor  
or an optocoupler output connected between the MULTI-  
FUNCTIONpinandtheSOURCEpinimplementsthisfunction  
withactive-on(Figure19)whileatransistororanoptocoupler  
outputconnectedbetweentheMULTI-FUNCTIONpinandthe  
CONTROL pin implements the function with active-off”  
(Figure 20).  
Line Overvoltage Shutdown (OV)  
ThesameresistorusedforUValsosetsanovervoltagethreshold  
which, once exceeded, will force TOPSwitch-FX output into  
off-state. The ratio of OV and UV thresholds is preset at 4.5  
as can be seen in Figure 8. This feature turns off the  
TOPSwitch-FX power MOSFET when the rectified DC high  
voltage exceeds the OV threshold. When the MOSFET is off,  
therectifiedDChighvoltagesurgecapabilityisincreasedtothe  
voltage rating of the MOSFET (700 V), due to the absence of  
the reflected voltage and leakage spikes on the drain. Small  
amountofhysteresisisprovidedontheOVthresholdtoprevent  
noise triggering. The OV feature can be disabled independent  
of UV feature as shown in Figure 15.  
When a signal is received at the MULTI-FUNCTION pin to  
disable the output through any of the MULTI-FUNCTION pin  
functions such as OV, UV and remote ON/OFF,  
TOPSwitch-FX always completes its current switching cycle as  
illustrated in Figure 7 before the output is forced off. The  
internal oscillator is stopped slightly before the end of the  
current cycle and stays there as long as the disable signal exists.  
When the signal at the MULTI-FUNCTION pin changes state  
from disable to enable, the internal oscillator starts the next  
switching cycle. This approach allows the use of this pin to  
synchronize TOPSwitch-FX to any external signal with a  
frequency lower than its internal switching frequency.  
Line Feed Forward with DCMAX Reduction  
The same resistor used for UV and OV also implements line  
voltage feed forward which minimizes output line ripple and  
reduces power supply output sensitivity to line transients. This  
Oscillator  
(SAW)  
D
MAX  
Enable from  
M Pin (STOP)  
Time  
PI-2558-092999  
Figure 7. Synchronization Timing Diagram.  
B
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