PFS122
8bit MTP MCU with 12-bit R-Type ADC
6.9.
Port A Digital Input Enable Register (padier), IO address = 0x0d..........................................64
6.10. Port B Digital Input Enable Register (pbdier), IO address = 0x0e..........................................65
6.11. Port A Data Register (pa), IO address = 0x10.......................................................................65
6.12. Port A Control Register (pac), IO address = 0x11 .................................................................65
6.13. Port A Pull-High Register (paph), IO address = 0x12 ............................................................65
6.14. Port A Pull-Low Register (papl), IO address = 0x13 ..............................................................65
6.15. Port B Data Register (pb), IO address = 0x15.......................................................................65
6.16. Port B Control Register (pbc), IO address = 0x16 .................................................................66
6.17. Port B Pull-High Register (pbph), IO address = 0x17 ............................................................66
6.18. Port B Pull-Low Register (pbpl), IO address = 0x18 ..............................................................66
6.19. ADC Control Register (adcc), IO address = 0x20..................................................................66
6.20. ADC Mode Register (adcm), IO address = 0x21 ...................................................................67
6.21. ADC Result High Register (adcrh), IO address = 0x22..........................................................67
6.22. ADC Result Low Register (adcrl), IO address = 0x23............................................................67
6.23. MISC Register (misc), IO address = 0x26 .............................................................................67
6.24. Comparator Control Register (gpcc), IO address = 0x2b.......................................................68
6.25. Comparator Selection Register (gpcs), IO address = 0x2c....................................................68
6.26. Timer2 Control Register (tm2c), IO address = 0x30 ..............................................................69
6.27. Timer2 Counter Register (tm2ct), IO address = 0x31 ............................................................69
6.28. Timer2 Scalar Register (tm2s), IO address = 0x32................................................................69
6.29. Timer2 Bound Register (tm2b), IO address = 0x33 ...............................................................70
6.30. Timer3 Control Register (tm3c), IO address = 0x34 ..............................................................70
6.31. Timer3 Counter Register (tm3ct), IO address = 0x35 ............................................................70
6.32. Timer3 Scalar Register (tm3s), IO address = 0x36................................................................71
6.33. Timer3 Bound Register (tm3b), IO address = 0x37 ...............................................................71
7. Instructions.........................................................................................................................72
7.1.
7.2.
7.3.
7.4.
7.5.
7.6.
7.7.
7.8.
7.9.
Data Transfer Instructions.....................................................................................................73
Arithmetic Operation Instructions ..........................................................................................76
Shift Operation Instructions...................................................................................................78
Logic Operation Instructions..................................................................................................79
Bit Operation Instructions......................................................................................................82
Conditional Operation Instructions ........................................................................................83
System control Instructions ...................................................................................................84
Summary of Instructions Execution Cycle .............................................................................85
Summary of affected flags by Instructions.............................................................................86
7.10. BIT definition.........................................................................................................................86
8. Code Options......................................................................................................................87
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PDK-DS-PFS122-EN_V000-May 28, 2020
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