PFS122
8bit MTP MCU with 12-bit R-Type ADC
Table of Contents
1. Features.................................................................................................................................8
1.1.
1.2.
1.3.
1.4.
Special Features.....................................................................................................................8
System Features.....................................................................................................................8
CPU Features .........................................................................................................................8
Package Information ...............................................................................................................8
2. General Description and Block Diagram ............................................................................9
3. Pin Assignment and Description.......................................................................................10
4. Device Characteristics .......................................................................................................16
4.1.
4.2.
4.3.
4.4.
4.5.
4.6.
4.7.
4.8.
4.9.
AC/DC Device Characteristics...............................................................................................16
Absolute Maximum Ratings...................................................................................................18
Typical ILRC frequency vs. VDD...........................................................................................18
Typical IHRC frequency deviation vs. VDD (calibrated to 16MHz).........................................18
Typical ILRC Frequency vs. Temperature .............................................................................19
Typical IHRC Frequency vs. Temperature (calibrated to 16MHz)..........................................19
Typical operating current vs. VDD @ system clock = ILRC/n................................................20
Typical operating current vs. VDD @ system clock = IHRC/n................................................20
Typical operating current vs. VDD @ system clock = 4MHz EOSC / n..................................21
4.10. Typical operating current vs. VDD @ system clock = 32KHz EOSC / n.................................21
4.11. Typical operating current vs. VDD @ system clock = 1MHz EOSC / n..................................22
4.12. Typical IO driving current (IOH) and sink current (IOL) .............................................................22
4.13. Typical IO input high/low threshold voltage (VIH/VIL) ..............................................................24
4.14. Typical resistance of IO pull high/low device .........................................................................25
4.15. Typical power down current (IPD) and power save current (IPS)..............................................26
5. Functional Description.......................................................................................................27
5.1.
5.2.
Program Memory - MTP........................................................................................................27
Boot Procedure.....................................................................................................................27
5.2.1. Timing charts for reset conditions..............................................................................28
Data Memory - SRAM...........................................................................................................29
Oscillator and clock...............................................................................................................29
5.4.1. Internal High RC oscillator and Internal Low RC oscillator.........................................29
5.4.2. Chip calibration..........................................................................................................29
5.4.3. IHRC Frequency Calibration and System Clock.........................................................30
5.4.4. External Crystal Oscillator .........................................................................................31
5.3.
5.4.
©Copyright 2020, PADAUK Technology Co. Ltd
Page 3 of 93
PDK-DS-PFS122-EN_V000-May 28, 2020