NE5517, NE5517A, AU5517
APPLICATIONS
+15V
0.01mF
10kW
INPUT
390pF
51W
1.3kW
3, 14
−
2, 15
NE5517
4, 13
+
6 0.01mF
11
1, 16
62kW
7, 10
5, 12
8, 9
OUTPUT
5kW
−15V
10kW
−15V
0.001mF
Figure 20. Unity Gain Follower
CIRCUIT DESCRIPTION
The circuit schematic diagram of one-half of the
AU5517/NE5517, a dual operational transconductance
amplifier with linearizing diodes and impedance buffers, is
shown in Figure 21.
Transconductance Amplifier
If V
IN
is small, the ratio of I
5
and I
4
will approach unity and
the Taylor series of In function can be approximated as
KT In I
5
[
KT I
5
*
I
4
q
q
I
4
I
4
and I
4
^
I
5
^
I
B
KT In I
5
[
KT I
5
*
I
4
+
2KT I
5
*
I
4
+
V
IN
q
q 1 2I
B
q
I
4
I
B
I
5
*
I
4
+
V
IN
I
B
q
(eq. 3)
The transistor pair, Q
4
and Q
5
, forms a transconductance
stage. The ratio of their collector currents (I
4
and I
5
,
respectively) is defined by the differential input voltage, V
IN
,
which is shown in Equation 1.
KT
V
IN
+
q In
I
4
I
5
(eq. 1)
(eq. 4)
2KT
Where V
IN
is the difference of the two input voltages
KT
≅
26 mV at room temperature (300°k).
Transistors Q
1
, Q
2
and diode D
1
form a current mirror which
focuses the sum of current I
4
and I
5
to be equal to amplifier bias
current I
B
:
I
4
)
I
5
+
I
B
V+
11
D4
Q6
Q10
The remaining transistors (Q
6
to Q
11
) and diodes (D
4
to D
6
)
form three current mirrors that produce an output current equal
to I
5
minus I
4
. Thus:
V
IN
I
B
q
2KT
+
I
O
(eq. 5)
The term
I
B
q
2KT
is then the transconductance of the amplifier
(eq. 2)
and is proportional to I
B
.
D6
Q14
Q12
7,10
Q13
8,9
Q7
Q11
2,15
D2
−INPUT
4,13
1,16
AMP BIAS
INPUT
Q1
D1
V−
6
Q4
Q5
D3
+INPUT
3,14
V OUTPUT
5,12
Q15
Q2
Q9
R1
Q8
D5
D8
D7
Q16
Q3
Figure 21. Circuit Diagram of NE5517
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