MC14069UB
PIN ASSIGNMENT
IN 1
OUT 1
IN 2
OUT 2
IN 3
OUT 3
V
SS
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
DD
IN 6
OUT 6
IN 5
OUT 5
IN 4
OUT 4
LOGIC DIAGRAM
1
3
5
9
11
13
2
4
6
8
10
12
V
DD
= PIN 14
V
SS
= PIN 7
CIRCUIT SCHEMATIC
(1/6 OF CIRCUIT SHOWN)
V
DD
INPUT*
OUTPUT
V
SS
*Double diode protection on all
inputs not shown.
20 ns
V
DD
14
PULSE
GENERATOR
INPUT
7
V
SS
C
L
OUTPUT
INPUT
t
PHL
OUTPUT
90%
50%
10%
t
THL
t
TLH
90%
50%
10%
20 ns
V
DD
V
SS
V
OH
V
OL
t
PLH
Figure 1. Switching Time Test Circuit and Waveforms
http://onsemi.com
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