Application Information
Application Circuits
The FMS6144A VoltagePlus™ video filter provides 6dB
gain from input to output. In addition, the input is slightly
offset to optimize the output driver performance. The
offset is held to the minimum required value to decrease
the standing DC current into the load. Typical voltage
levels are shown in Figure 13:
Video Cables
75ꢀ
LOAD2
(optional)
75ꢀ
75ꢀ
0.65V
Y
LOAD1
Driver
IN
Y
OUT
75ꢀ
Video Cables
1.0 -> 1.02V
0.65 -> 0.67V
0.3 -> 0.32V
Figure 14. Input Clamp Circuit
I/O Configurations
For a DC-coupled DAC drive with DC-coupled outputs,
use the configurationin Figure 15.
0.0 -> 0.02V
V
IN
2.28V
1.58V
Driven by:
0V - 1.4V
DC-Coupled DAC Outputs
AC-Coupled and Clamped
Y, CV, R, G, B
DVD or
STB
SoC
LCVF
Clamp
Inactive
75W
0.88V
0.28V
V
OUT
DAC
Output
There is a 280mV offset from the DC input level to theꢀ
DC output level. V
= 2 * V + 280mV.
IN
OUT
Figure 15. DC-Coupled Inputs and Outputs
0.85V
0.5V
Alternatively, if the DAC’s average DC output level causes
the signal to exceed the range of 0V to 1.4V, it can be
AC coupled as follows:
0.15V
V
IN
0V - 1.4V
0.1μ
1.98V
1.28V
0.58V
DVD or
STB
SoC
DAC
Output
LCVF
Clamp
Active
75ꢀ
Driven by:
AC-Coupled and Biased
U, V, Pb, Pr, C
V
OUT
Figure 13. Typical Voltage Levels
The FMS6144A provides an internal diode clamp to
support AC-coupled input signals. If the input signal
does not go below ground, the input clamp does not
operate. This allows DAC outputs to directly drive the
FMS6144A without an AC-coupling capacitor. When the
input is AC coupled, the diode clamp sets the sync tip
(or lowest voltage) just below ground. The worst-case
sync tip compression due to the clamp cannot exceed
7mV. The input level set by the clamp, combined with
the internal DC offset, keeps the output within its
acceptable range.
Figure 16. AC-Coupled Inputs, DC-Coupled Outputs
When FMS6144A is driven by an unknown external
source or a SCART switch with its own clamping circuitry,
the inputs should be AC coupled like Figure 17.
0V - 1.4V
0.1μ
LCVF
75ꢀ
External video
Clamp
source must
Active
be AC coupled
75ꢀ
For symmetric signals like Chroma, U, V, Pb, and Pr;
the average DC bias is fairly constant and the inputs can
be AC-coupled with the addition of a pull-up resistor to
set the DC input voltage. DAC outputs can also drive
these same signals without the AC coupling capacitor. A
conceptual illustration of the input clamp circuit is shown
in Figure 14.
Figure 17. SCART with DC-Coupled Outputs
© 2009 Fairchild Semiconductor Corporation
FMS6144A • Rev. 1.0.2
www.fairchildsemi.com
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