BASE DRIVE
The Key to Performance
By now, the concept of controlling the shape of the turn–off
This shows the parameter that really matters, dissipation,
whether caused by switching or by saturation. For very low
base current is widely accepted and applied in horizontal
deflection design. The problem stems from the fact that good
saturation of the output device, prior to turn–off, must be as-
sured. This is accomplished by providing more than enough
L
h
a very narrow optimum is obtained. This occurs when I
B
B1
I
, and therefore would be acceptable only for the
CM
FE
“typical” device with constant I
curves become broader and flatter above the I . h = I
point as the turn off “tails” are brought under control. Eventu-
. As L is increased, the
CM
B
I
to satisfy the lowest gain output device h
at the end of
B1
scan I
FE
B1 FE CM
. Worst–case component variations and maximum
CM
high voltage loading must also be taken into account.
If the base of the output transistor is driven by a very low
impedance source, the turn–off base current will reverse
very quickly as shown in Fig. 3. This results in rapid, but only
partial collector turn–off, because excess carriers become
trapped in the high resistivity collector and the transistor is
still conductive. This is a high dissipation mode, since the
collector voltage is rising very rapidly. The problem is over-
come by adding inductance to the base circuit to slow the
base current reversal as shown in Fig. 4, thus allowing ac-
cess carrier recombination in the collector to occur while the
base current is still flowing.
ally, if L is raised too far, the dissipation all across the curve
B
will rise, due to poor initiation of switching rather than tailing.
Plotting this type of curve family for devices of different h
,
FE
essentially moves the curves to the left, or right according to
the relation I = constant. It then becomes obvious that,
h
B1 FE
for a specified I , an L can be chosen which will give low
CM
B
dissipation over a range of h
and/or I . The only remain-
FE
high enough to accommodate the
B1
ing decision is to pick I
B1
lowest h
part specified. Neither L nor I are absolutely
FE
critical. Due to the high gain of Motorola devices it is sug-
gested that in general a low value of I be used to obtain
B
B1
B1
optimum efficiency — eg. for BU208A with I
= 4.5 A use
CM
1.2 A. These values are
Choosing the right L Is usually done empirically since the
I
1.5 A, at I
= 4 A use I
B
B1
CM B1
equivalent circuit is complex, and since there are several
lower than for most competition devices but practical tests
have showed comparable efficiency for Motorola devices
importantvariables(I
to plot fall time as a function of L , at the desired conditions,
for several devices within the h
FE
mative method is to plot power dissipation versus I
,I ,andh atI
).Onemethodis
CM B1 FE CM
even at the higher level of I
.
B
B1
specification. A more infor-
An L of 10 µH to 12 µH should give satisfactory operation
B
for a
of BU208A with I
2 A.
of 4 to 4.5 A and I
between 1.2 and
B1
CM
B1
range of values of L .
B
TEST CIRCUIT WAVEFORMS
I
I
B
B
I
C
I
C
(TIME)
(TIME)
Figure 3
Figure 4
TEST CIRCUIT OPTIMIZATION
The test circuit may be used to evaluate devices in the
conventional manner, i.e., to measure fall time, storage time,
and saturation voltage. However, this circuit was designed to
evaluate devices by a simple criterion, power supply input.
Excessive power input can be caused by a variety of prob-
lems, but it is the dissipation in the transistor that is of funda-
mental importance. Once the required transistor operating
current is determined, fixed circuit values may be selected.
4
Motorola Bipolar Power Transistor Device Data
ONSEMI [ ONSEMI ]
