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11486-912 参数 Datasheet PDF下载

11486-912图片预览
型号: 11486-912
PDF下载: 下载PDF文件 查看货源
内容描述: [150MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO16, 0.150 INCH, LEAD FREE, SOIC-16]
分类和应用: 时钟光电二极管外围集成电路晶体
文件页数/大小: 21 页 / 1496 K
品牌: ONSEMI [ ONSEMI ]
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Data Sheet  
FS6377-01/FS6377-01g Programmable 3-PLL Clock Generator IC  
Table 13. AC Timing Specifications  
Clock  
(MHz)  
Parameter  
Overall  
Symbol Conditions/Description  
Min.  
Typ.  
Max.  
Units  
0.8  
0.8  
40  
150  
100  
230  
170  
DD  
V
V
V
V
= 5.5V  
= 3.6V  
= 5.5V  
= 3.6V  
Output Frequency*  
MHz  
O
f
f
DD  
DD  
DD  
VCO Frequency*  
VCO Gain*  
MHz  
MHz/V  
µs  
VCO  
40  
400  
7
VCO  
A
LFTC bit = 0  
LFTC bit = 1  
O
Loop Filter Time Constant*  
20  
1.9  
1.6  
1.8  
1.5  
L
V = 0.5V to 4.5V; C = 15pF  
Rise Time*  
Fall Time*  
ns  
ns  
r
t
O
L
V = 0.3V to 3.0V; C = 15pF  
O
L
V = 4.5V to 0.5V; C = 15pF  
r
t
O
L
V = 3.0V to 0.3V; C = 15pF  
Tristate Enable Delay*  
Tristate Disable Delay*  
1
1
8
8
ns  
ns  
PZL, PZH  
t
t
t
PZL, PZH  
t
Output active from power-up, via PD pin  
After last register is written  
100  
µs  
ms  
Clock Stabilization Time*  
STB  
t
1
Divider Modulus  
Feedback Divider  
Reference Divider  
Post Divider  
See also Table 2  
See also Table 8  
8
1
1
2047  
255  
50  
F
N
N
N
R
P
Clock Outputs (PLL A clock via CLK_A pin)  
Ratio of pulse width (as measured from rising edge to  
next falling edge at 2.5V) to one clock period  
Duty Cycle*  
100  
100  
45  
55  
%
On rising edges 500µs apart at 2.5V relative to an  
L
XIN  
F
R
ideal clock, C =15pF, f =14.318MHz, N =220, N =63,  
45  
PX  
N
=50, no other PLLs active  
y
Jitter, Long Term (σ (τ))*  
ps  
j(LT)  
t
t
On rising edges 500µs apart at 2.5V relative to an  
L
XIN  
F
R
ideal clock, C =15pF, f =14.318MHz, N =220, N =63,  
50  
100  
50  
165  
110  
390  
PX  
N
=50, all other PLLs active (B=60MHz, C=40MHz,  
D=14.318MHz)  
From rising edge to the next rising edge at 2.5V,  
L
XIN  
F
R
PX  
C =15pF, f =14.318MHz, N =220, N =63, N =50, no  
other PLLs active  
j(P)  
Jitter, Period (peak-peak)*  
ps  
From rising edge to the next rising edge at 2.5V,  
L
XIN  
F
R
PX  
C =15pF, f =14.318MHz, N =220, N =63, N =50, all  
other PLLs active (B=60MHz, C=40MHz,  
D=14.318MHz)  
DD  
A
Unless otherwise stated, V = 5.0V ± 10%, no load on any output, and ambient temperature range T = 0°C to 70°C. Parameters denoted with an asterisk ( * ) represent nominal  
characterization data and are not currently production tested to any specific limits. Min. and Max. characterization data are ± 3σ from typical.  
AMI Semiconductor  
www.amis.com  
16