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MSM7702-01MS-K 参数 Datasheet PDF下载

MSM7702-01MS-K图片预览
型号: MSM7702-01MS-K
PDF下载: 下载PDF文件 查看货源
内容描述: 单铁CODEC [Single Rail CODEC]
分类和应用: 电信集成电路光电二极管PC
文件页数/大小: 17 页 / 130 K
品牌: OKI [ OKI ELECTRONIC COMPONETS ]
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¡ Semiconductor  
MSM7702-01/02/03  
ABSOLUTE MAXIMUM RATINGS  
Parameter  
Power Supply Voltage  
Analog Input Voltage  
Digital Input Voltage  
Storage Temperature  
Symbol  
VDD  
Condition  
Rating  
0 to 7  
Unit  
V
VAIN  
–0.3 to VDD + 0.3  
–0.3 to VDD + 0.3  
–55 to +150  
V
VDIN  
TSTG  
V
°C  
RECOMMENDED OPERATING CONDITIONS  
Parameter  
Power Supply Voltage  
Operating Temperature  
Analog Input Voltage  
Symbol  
VDD Voltage must be fixed  
Ta  
Condition  
Min.  
Typ.  
3.0  
Max.  
Unit  
V
2.7  
–30  
3.8  
+85  
1.4  
+25  
°C  
VAIN Connect AIN– and GSX  
VPP  
Input High Voltage  
Input Low Voltage  
VIH  
0.45 ¥ VDD  
VDD  
V
V
XSYNC, RSYNC, BCLK,  
PCMIN, PDN, ALAW  
VIL  
0
0.16 ¥ VDD  
64, 128, 256, 512, 1024,  
2048, 96, 192, 384, 768,  
1536, 1544, 200  
Clock Frequency  
FC  
BCLK  
kHz  
Sync Pulse Frequency  
Clock Duty Ratio  
FS  
DC  
tIr  
XSYNC, RSYNC  
6.0  
40  
8.0  
50  
10.0  
60  
kHz  
%
BCLK  
Digital Input Rise Time  
Digital Input Fall Time  
XSYNC, RSYNC, BCLK,  
PCMIN, PDN, ALAW  
50  
ns  
tIf  
50  
ns  
tXS  
tSX  
tRS  
tSR  
BCLKÆXSYNC, See Timing Diagram  
XSYNCÆBCLK, See Timing Diagram  
BCLKÆRSYNC, See Timing Diagram  
RSYNCÆBCLK, See Timing Diagram  
100  
100  
100  
100  
1 BCLK  
100  
100  
0.5  
ns  
Transmit Sync Pulse Setting Time  
Receive Sync Pulse Setting Time  
ns  
ns  
ns  
Sync Pulse Width  
PCMIN Set-up Time  
PCMIN Hold Time  
tWS XSYNC, RSYNC  
100  
ms  
ns  
tDS  
tDH  
ns  
RDL Pull-up resistor  
kW  
pF  
Digital Output Load  
CDL  
Voff  
100  
+100  
+10  
1
Transmit gain stage, Gain = 1  
Transmit gain stage, Gain = 10  
XSYNC, RSYNC, BCLK  
–100  
–10  
mV  
mV  
ms  
Analog Input Allowable DC Offset  
Allowable Jitter Width  
8/17