FEDL9092-01
OKI Semiconductor
ML9092-01/02/03/04
3) Parallel-in/Serial-out Shift Register
The KREQ signal goes to a low level when the rotary encoder read instruction is executed, when the
UP/DOWN counter will be reset to “0”.
CS
1
2
8
9
10 11 12 13 14 15 16
CP
DI/O
READ DATA1
Instruction code
Output state
Input state
KREQ
Figure 8 Operation of KREQ Output
Notes:
1. The KREQ signal is output by a logical OR of the KREQ signal generated by a key scan and the
KREQ signal generated by the rotary encoder. The KREQ signal from the rotary encoder is reset by
executing the rotary encoder read instruction; however, the KREQ signal generated by a key scan is
not reset even if the key scan register read instruction is executed. Also, if the KREQ signal is
generated by a key scan, it will not be reset even if the rotary encoder read instruction is executed.
Although dependent on the components glued to this LSI, it is recommended that the rotary encoder
read instruction and key scan register read instruction be executed as a set when the KREQ signal
goes to a “H” level.
2. The maximum read cycle time for when the KREQ signal is at a “H” level is practically determined by
the signal input from the rotary encoder and the 3-bit counter built into this LSI. Therefore, make the
time taken before starting to execute the rotary encoder read instruction 12 ms or less.
3. Using a rotary encoder switch that has the click stabilizing points shown below is recommended.
A signal
B signal
Click stabilizing points
Waveform of a Recommended Rotary Encoder Switch
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