FEDL9092-01
OKI Semiconductor
ML9092-01/02/03/04
X•Y address Counter Auto Increment
The liquid crystal display RAM has an X-address counter and a Y-address counter. Each address counter has an
Auto Increment function.
When display data is read or written, this function increments either of these X- and Y-address counters (which is
selected by the INC bit (D7 bit) of the control register 1).
INC bit = “0” selects the Y-address counter.
INC bit = “1” selects the X-address counter.
The address counting cycle of the X address counter varies according to the selected word length (8 bits or 6 bits):
X address range of 0 to 6 (ML9092-01) or 0 to7 (ML9092-02/03/04) in the 8-bits/word mode or X address range of
0 to 9 in the 6-bits/word mode.
When the X address count returns to 0 from a maximum value (6 (ML9092-01) or 7 (ML9092-02/03/04) in the
8-bits/word mode, or 9 in the 6-bits/word mode), the Y address is also incremented automatically.
The relationship between display duties and Y address count ranges is shown below.
When the Y-address counter returns to 0 from a maximum value, the X address is also incremented automatically.
Model
Duty
1/8
Y-address count range (cycle)
Maximum Y address count
0 to 7
0 to 8
0 to 9
7
8
9
ML9092-01/02/03/04
1/9
1/10
Note:
If an invalid address (outside the address count range) is given to the X- or Y- address counter,
its counting will not be assured.
Example of incrementing the X-address
(8 bits per word and 1/10 duty)
Example of incrementing the Y-address
(8 bits per word and 1/10 duty)
X address
0
1
7
X address
2
0
1
2
0
1
7
0
1
9
9
56/66
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