PEDL9090-02
¡ Semiconductor
ML9090-01,-02
X, Y address Counter Auto Increment
The display RAM of the ML9090-01 and ML9090-02 has an X address counter and a Y address
counter. Both counters have an auto increment function. Writing or reading display data will
cause either the X or Y address counter to be incremented. The INC bit (D7 bit) setting of control
register 1 selects either the X address or Y address to be incremented.
(When X address is selected) (INC = “1”)
The address count cycle of the X address counter differs depending upon whether the word
length is 8 bits or 6 bits.
If the word length is 8 bits, X addresses in the range of 0 to 9 are counted.
If the word length is 6 bits, X addresses in the range of 0 to 13 are counted.
When the X address count value returns from its maximum value (9 in the case of 8-bit word
length, 13 in the case of 6-bit word length) to 0, the Y address is also automatically incremented.
(When Y address is selected) (INC = “0”)
The address count cycle of the Y address counter differs depending upon whether the display
duty is 1/8, 1/9, 1/10, 1/16, 1/17, or 1/18.
If the display duty is 1/8, Y addresses in the range of 0 to 7 are counted.
If the display duty is 1/9, Y addresses in the range of 0 to 8 are counted.
If the display duty is 1/10, Y addresses in the range of 0 to 9 are counted.
If the display duty is 1/16, Y addresses in the range of 0 to 15 are counted.
If the display duty is 1/17, Y addresses in the range of 0 to 16 are counted.
If the display duty is 1/18, Y addresses in the range of 0 to 17 are counted.
When the Y address count value returns from its maximum value (7 in the case of 1/8 display
duty, 8 in the case of 1/9 display duty, 9 in the case of 1/10 display duty, 15 in the case of 1/16
display duty, 16 in the case of 1/17 display duty, and 17 in the case of 1/18 display duty) to 0,
the X address is also automatically incremented.
Note:
If an address outside the count cycle range of the X, Y address counter is set, proper
operation of the X, Y address counter is not guaranteed.
1. X address increment example
(8-bit word length, 1/18 duty)
2. Y address increment example
(8-bit word length, 1/18 duty)
X address
X address
0
1
9
0
0
1
2
9
0
1
0
1
2
17
0
17
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