PEDL9090-02
¡ Semiconductor
ML9090-01,-02
Display screen and memory address
The ML9090 contains an internal bit-mapped display RAM (80 ¥ 18 bits). As shown in figure 2,
display data is written to display memory such that the MSB of the display data is written to the
(Xn, Yn) memory address and the LSB is written to the (Xn+7, Yn) address. Writing a “1” to the
display memory turns on the display of the LCD panel and writing a “0” turns off the display.
As shown in figure 3, address allocation is different depending upon whether an 8-bit or 6-bit
word length is selected. For an 8-bit word length, addresses are allocated from 0 to 9, and for a
6-bit word length, addresses are allocated from 0 to 13.
When 6-bits/word are selected and the X address is 13, the display memory is only 2 bits; 2 bits
from the MSB of the display data (D5 and D4) are written to memory and the remaining 4 bits
(D3 to D0) are invalid.
COM1
COM2
80 ¥ 18 dot LCD panel
COM18
X direction
Y0
Y1
1
0
1
0
1
0
1
0
(MSB)
(LSB)
80 ¥ 18 dit display RAM
Y17
Figure 2 Correspondence Between Display Screen and Memory
Address Allocation for 8 bits/Word
Address Allocation for 6 bits/Word
0
1
2
9
0
1
2
13
0
1
0
1
(8 bits)
(6 bits)
(2 bits)
17
17
Figure 3 Display Memory Addresses
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