FEDL7033-02
ML7033
1
Semiconductor
PIN DESCRIPTIONS
Pin
1
2
3
4
5
6
7
8
Symbol
N.C
Type
—
I
Description
(Leave unconnected)
AIN1N
GSX1
AOUT1P
AOUT1N
TOUT1
AG
SG
SGC
AG
TOUT2
AOUT2N
AOUT2P
GSX2
AIN2N
N.C
N.C
AIN2P
VDDA
CH1 Transmit Op-amp Input Negative
CH1 Transmit Op-amp Output
CH1 Receive Output Positive
CH1 Receive Output Negative
CH1 Tone Output
O
O
O
O
—
O
O
—
O
O
O
O
I
—
—
I
—
—
O
I
Analog Ground
Signal Ground for External Circuit
Signal Ground for Internal Circuit
Analog Ground
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
CH2 Tone Output
CH2 Receive Output Negative
CH2 Receive Output Positive
CH2 Transmit Op-amp Output
CH2 Transmit Op-amp Input Negative
(Leave unconnected)
(Leave unconnected)
CH2 Transmit Op-amp Input Positive
Power Supply for Internal Analog Circuit
Power Supply for Internal Digital Circuit
Output for SLIC2 Battery Select
Input from SLIC2 Thermal Shut Down Alarm Detector
Input from SLIC2 Switch Hook, Ground Key or Ring Trip Detector
Output for SLIC2 Detector Mode Selection
Mode Control Output to SLIC2 F0
Mode Control Output to SLIC2 F1
Mode Control Output to SLIC2 F2
Output for SLIC2 Uncommitted Switch Control
Digital Ground
VDDD
BSEL2
ALM2
DET2
E0_2
F0_2
I
O
O
O
O
O
—
I
F1_2
F2_2
SWC2
DG
CIDATA1
CIDATA2
N.C
N.C
INT
EXCK
DEN
Call ID Data Input for CH1
Call ID Data Input for CH2
(Leave unconnected)
(Leave unconnected)
I
—
—
O
I
Interrupt Output (from SLIC status)
MCU Interface Data Clock Input
MCU Interface Data Enable Input
MCU Interface Control Data Input/Output
I
DIO
I/O
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