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ML7022-01MB 参数 Datasheet PDF下载

ML7022-01MB图片预览
型号: ML7022-01MB
PDF下载: 下载PDF文件 查看货源
内容描述: 单轨双通道PCM编解码器 [Single Rail Dual Channel PCM CODEC]
分类和应用: 解码器编解码器电信集成电路电信电路光电二极管PC
文件页数/大小: 20 页 / 119 K
品牌: OKI [ OKI ELECTRONIC COMPONETS ]
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FEDL7022-01-06  
1
Semiconductor  
ML7022-01  
C1A, C2A, C3A, C1B, C2B, C3B  
General-purpose latched output signal.  
C1A, C2A, C3A, C1B, C2B, C3B bits of DIN are latched using internal timing.  
These outputs can drive a LSTTL/CMOS device without external resistor.  
PDN  
Power down control signal.  
When PDN is at logic “0” level, both Channel 1 and Channel 2 circuits are in the power down state. Also, all  
internal latches are in initial state (logic “0” level).  
TEST1, TEST2, TEST3, TEST4, TEST5, TEST6  
These pins are used for device test.  
These device test pin must be connected to the AG pin.  
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