FEDL675001-01
OKI Semiconductor
ML675001/67Q5002/67Q5003
ELECTRICAL CHARACTERISTICS
DC Characteristics
(VDD_CORE = 2.25 to 2.75V, VDD_IO = 3.0 to 3.6V, Ta = –40 to +85°C)
Item
Symbol
VIH
VIL
VT+
VT−
VHYS
Conditions
Minimum
VDD_IOx0.8
–0.3
—
0.7
0.4
VDD–0.2
2.35
—
Typical
Maximum
Unit
High level input voltage
Low level input voltage
—
—
1.6
1.1
0.5
—
—
—
—
—
VDD_IO+0.3
VDD_IOx0.2
2.1
—
Schmitt input buffer
threshold voltage
—
—
—
—
V
IOH = –100 µA
High level output voltage
VOH
VOL
I
OH = –4 mA
Low level output voltage
Low level output voltage
Low level output voltage
IOL = 100 µA
IOL = 4 mA
0.2
1
2
*
*
—
—
–50
0.45
0.45
50
I
OL = 6 mA
3
Input leak current
*
*
*
IIH/IIL
IIL
VI = 0 V/VDD_IO
—
VI = 0 V
Pull-up resistance of
50 kΩ
VI = AVDD / 0 V
VO = 0 V/VDD_IO
4
5
Input leak current
–200
–73
–10
µA
Input leak current
Output leak current
Input pin capacitance
Output pin capacitance
I/O pin capacitance
II
ILO
CI
CO
CIO
–5
–50
—
—
—
—
—
6
9
10
5
50
—
—
—
—
—
—
pF
Analog-to-digital
—
—
320
1
650
2
converter operative *6
Analog reference power
supply current
IREF
Analog-to-digital
converter stopped
µA
IDDS_CORE
IDDS_IO
IDDH_CORE
IDDH_IO
IDD_CORE
IDD_IO
—
—
20
10
150
40
Current consumption
(STANDBY)
7
Ta = 25°C
*
—
—
—
—
37
6
75
17
55
10
120
25
Current consumption
(HALT) *8
fOP = 60 MHz
CL = 30 pF
mA
Current consumption (RUN)
9
*
Notes
1. All output pins except XA[15:0]
2. XA[15:0]
3. All input pins except RESET_N
4. RESET_N pin, with 50 kΩ pull-up resistance
5. Analog input pins (AIN0 to AIN3)
6. Analog-to-Digital Converter operation ratio is 20%
7. VDD_IO or 0 V for input ports; no load for other pins
8. DRAM controller blocks stopped by DRAME_N pin setting
9. Cacheable setting and external ROM used
20/24
OKI [ OKI ELECTRONIC COMPONETS ]
